Fu Ning

Sparsity-based radar signal sorting method in electronic support measures system

In view of low radar signal sorting accuracy in electronic support measures system (ESM), a new sparsity-based radar signal sorting method is put forward in this paper. Firstly, the pulse description words (PDW) of radar pulse sequence are analyzed and normalized, and then represented as a sparse linear combination of the sparse representation dictionary. Secondly, the sparse solution is calculated by solving an optimization problem under L1 norm. Finally, the linear correlation coefficients between the sparse solutions of test sample and standard samples are calculated and compared to determine the classification of radar signal. The experiment result showed that the radar signal sorting accuracy of this method is 96%, and the performance of the method is superior to other radar signal sorting algorithms. So this sparsity-based radar signal sorting method has high accuracy and strong anti-noise interference ability.

Method of LFM pulse compression implementation based on FPGA

For the achievement of LFM signal acquisition, pulse compression and storage, the hardware platform is built. A way to implement the pulse compression of the LFM signal based on FPGA is presented. This paper describes in detail the functions and implementation methods of the various functional modules of the FPGA in the pulse compression process. A theoretical simulation on the pulse compression is done, and the actual test results are analyzed after compared with the theoretical simulation.

Research on prediction model for NAND flash bit errors

NAND flash memory has become more and more widespread storage medium due to its outstanding read/write performance. With the aggressive scaling of NAND flash memory, the storage reliability continued decreasing. While there are lacks of effective evaluation methods for modeling the NAND flash bit errors, most current studies only focus on the single program disturb error or the data retention error. If conducting a method to completely evaluate NAND flash error distribution, it will provide significative guidance for Flash Translation Layer (FTL) algorithms and Error Correction Codes (ECC) to improve the performance of NAND flash. To solve these problems, we have obtained a large amount of data about bit errors from our experimental platform for NAND flash. According to the measured data, we first proposed a polynomial evaluation model for NAND flash bit errors. To achieve the effective prediction, we compared the effectiveness of different evaluation models. The detailed test results show that our polynomial prediction model for NAND flash bit errors has good approximation ability and strong error tolerance, and the model will have comprehensive applications prospect.