Fumihiko Inoue

Thermal budget for fabricating a dual gate deep-submicron CMOS with thin pure gate oxide

We studied the diffusion of impurities in dual polysilicon gates, and found that this phenomenon can effectively be treated as diffusion from a constant concentration diffusion source for both p + and n + polysilicon gates. We derived a model for the critical time required to obtain a flat profile. We then clarified the thermal budget required for suppressing gate depletion and impurity penetration through a gate oxide. According to our study, the thermal budget for n-type metal-oxide-semiconductor-field-effect-transistor (MOSFET) is always wider than that for p-type MOSFET, and the budget for p-type MOSFET is wide enough for realizing a flat profile without impurity penetration using pure SiO 2 if B is available instead of BF 2 .

Impact of Defects in Silicon Substrate on Flash Memory Characteristics

Floating-gate-type Flash memories are fabricated on Czochralski (CZ) silicon wafers. A large amount of residual misalignment in reticle shots at the photolithography process step and the programing failure are observed in the low oxygen concentration wafer. To investigate the origin of misalignment and programing failure, X-ray topography, optical microscope observation followed by preferential etching and laser scattering tomography observation are performed. Slip propagation from wafer edge to wafer center and surface dislocation are observed in the area where misalignment and programing failure are occurred. Misalignment and programing failure are explained by the plastic deformation of wafer by the relaxation of internal stress during the processes. In the high Oi wafer, we observed that oxygen precipitates (OPs) prevent the propagation of slip. We conclude that the OPs have a strong effect on the suppression of slip propagation, i.e., Flash memory characteristics.

Particle reduction using Y2O3 material in an etching tool

Particles between metal lines were detected on etched wafers in a process tool with an Al2O3 window on top of the chamber. The particle was speculated to be derived from fluorinated Al2O3 surface in the chamber. In this paper, an attempt was described to reduce that kind of particles by using Y2O3 material within the chamber.

Mobile-Ion-Induced Charge Loss Failure in Silicon–Oxide–Nitride–Oxide–Silicon Two-Bit Storage Flash Memory

In silicon–oxide–nitride–oxide–silicon (SONOS) 2-bit storage flash memory, we discovered deterioration of data retention (DR) in the form of charge loss, which is dependent on the distance between contact windows and word lines (WLs) and also on the thermal treatment performed after the formation of contact windows. We hypothesized that the unique structure of the SONOS flash memory leads to susceptibility to mobile ion contamination. We concluded that Na mobile ion contamination originates in the tungsten chemical–mechanical polishing (W-CMP) process, and that the ions diffuse through the boundaries of the boron phosphosilicate glass (BPSG) and stacked oxide–nitride–oxide (ONO) films into the cell area. We successfully reduced the charge loss by cleaning of the contamination source and by the stable control of phosphorus concentration at the bottom of the BPSG. As a permanent countermeasure, we proposed the complete isolation of contact windows from the adjacent ONO layer, and we were able to demonstrate the effectiveness of this proposal.