Fuwei Wu

Influence of additional drain currents on response of CMOS terahertz detectors

We investigate the influence of additional dc current on response of CMOS THz detectors. A resistive self-mixing model calculation, shows that the voltage response of CMOS detectors increases significantly by applying a small dc current on the drain side of CMOS device. The calculation results are further verified by the experimental data from CMOS detectors at 0.65THz. The maximum voltage response increases by one order of magnitude in the dc current mode. The results suggest that the additional dc current bias method is the most direct way for improving the response of CMOS THz detectors.

Responsivity Enhanced NMOSFET Photodetector Fabricated by Standard CMOS Technology

Increasing the responsivity is one of the important issues for a photodetector. In this paper, we demonstrate an improved NMOSFET photodetector by using deep-n-well (DNW) structure which can improve the responsivity of the photodetector significantly. The experimental results show that the responsivity can be enhanced greatly by the DNW structure and is much larger than the previous work when DNW is biased with 0.5 V, while the dark current exhibits almost no increase. Further characterization indicates that the diode formed by the bulk and DNW can efficiently absorb photons and has a large gain factor of the photocurrent especially under low light condition, which gives a more promising application for the detector to detect the weak light.

TCAD simulation of gate-enclosed MOSFET for terahertz detector

The source parasitic capacitor significantly influences the terahertz responsivity for CMOS terahertz detector. In this paper, the gate-enclosed MOSFET is used for terahertz signal detection in order to reduce the source parasitic capacitor. 3D-TCAD simulation reveals that the gate-enclosed structure improves the voltage responsivity (Rv) of the THz detectors and reduces noise-equivalent power (NEP) effectively by comparing with the equal conventional MOSFET detectors. A maximum Rv of 3 kV/W and a minimum NEP of 42pW/√Hz are achieved for the gate-enclosed nMOSFETs implemented in 0.18μm CMOS technology.