G.A.M. Hurkx

A new analytical diode model including tunneling and avalanche breakdown

An analytical model describing reverse and forward DC characteristics is presented. It serves as a basis for a compact model for circuit simulation purposes. The model is based on the solution of the hole continuity equation in the depletion layer of a p-n junction and incorporates the following physical mechanisms: band-to-band tunneling, trap-assisted tunneling (both under forward and reverse bias), Shockley-Read-Hall recombination, and avalanche breakdown. It contains seven parameters which can be determined at one temperature. No additional parameters are needed to describe the temperature dependence. From comparisons with both numerical simulations and measurements it is found that the model gives an adequate description of the DC characteristics in both forward and reverse modes. >

The relevance of f/sub T/ and f/sub max/ for the speed of a bipolar CE amplifier stage

Expressions relating the bandwidth of a common-emitter (CE) amplifier stage and the small-signal CML gate delay time to directly measurable transistor parameters, such as f/sub T/, f/sub max/, and input bandwidth f/sub /spl upsi//, are presented. They are valid for an arbitrary division of the base resistance and base-collector depletion capacitance into internal and external components. No resistance measurements are needed. It is shown that the transistor input bandwidth f/sub /spl upsi// is an important figure of merit for the speed of a CE stage. Under a given bias condition, f/sub /spl upsi// is determined by the base resistance and the cut-off frequency. In most cases the value of the maximum oscillation frequency f/sub max/ is only of minor importance. It would therefore be more meaningful to present besides f/sub T/ also f/sub /spl upsi// instead of f/sub max/ as a figure of merit for transistors for high-speed, low-power analog and digital circuits.

A figure of merit for the high-frequency noise behavior of bipolar transistors

In this paper a new figure of merit for high frequency noise behavior for use in the evaluation and development of bipolar silicon process technology is introduced. Basic low noise design rules for optimum transistor biasing and emitter scaling are proposed. >

Modelling Forward-Biased Tunneling

A recombination model is presented that incorporates trap-assisted tunnelling in a Shockley-Read-Hall type formulation. This model is based an a simple quantum-mechanical treatment of the p-n junction. using the envelope-function approach. By comparison with experiments it is shown that the model agrees well with the measured reduced temperature dependence and large non-ideality factor associated with tunnelling currents in forward-biased junctions.