G. Drake

FELIX: a high-throughput network approach for interfacing to front end electronics for ATLAS upgrades

The ATLAS experiment at CERN is planning full deployment of a new unified optical link technology for connecting detector front end electronics on the timescale of the LHC Run 4 (2025). It is estimated that roughly 8000 GBT (GigaBit Transceiver) links, with transfer rates up to 10.24 Gbps, will replace existing links used for readout, detector control and distribution of timing and trigger information. A new class of devices will be needed to interface many GBT links to the rest of the trigger, data-acquisition and detector control systems. In this paper FELIX (Front End LInk eXchange) is presented, a PC-based device to route data from and to multiple GBT links via a high-performance general purpose network capable of a total throughput up to O(20 Tbps). FELIX implies architectural changes to the ATLAS data acquisition system, such as the use of industry standard COTS components early in the DAQ chain. Additionally the design and implementation of a FELIX demonstration platform is presented and hardware and software aspects will be discussed.

QIE10: a new front-end custom integrated circuit for high-rate experiments

We present results on a new version of the QIE (Charge Integrator and Encoder), a custom Application Specific Integrated Circuit (ASIC) designed at Fermilab. Developed specifically for the measurement of charge from photo-detectors in high-rate environments, this most recent addition to the QIE family features 3 fC sensitivity, 17-bits of dynamic range with logarithmic response, a Time-to-Digital Converter (TDC) with sub-nanosecond resolution, and internal charge injection. The device is capable of dead-timeless operation at 40 MHz, making it ideal for calorimetry at the Large hadron Collider (LHC). We present bench measurements and integration studies that characterize the performance, radiation tolerance measurements, and plans for deployment in the Atlas and CMS detectors as part of the Phase 1 and Phase 2 upgrades.

Upgrade analog readout and digitizing system for ATLAS TileCal demonstrator

The TileCal Demonstrator is a prototype for the future upgrade of the ATLAS hadron calorimeter when the Large Hadron Collider increases luminosity in year 2023 (HL-LHC). It will be used for functionality and performance tests. The Demonstrator has 48 channels of upgraded readout and digitizing electronics and a new digital trigger capability, but is backwards-compatible with the present detector system insofar as it also provides analog trigger signals and can communicate as the present system. The on-detector part of the Demonstrator is comprised of 4 identical mechanical mini-drawers, each equipped with up to 12 photomultipliers (PMTs). The on-detector electronics includes 45 Analog Front-End Boards, each serving an individual PMT; 4 Main Boards, each to control and digitize up to 12 PMT signals, and 4 corresponding high-speed Daughter Boards serving as data hubs between on-detector and off-detector electronics. It is fully compatible with the present system, accepting ATLAS triggers, timing and slow control commands for the data acquisition, detector control, and detector operation monitoring. We plan to insert one fully functional Demonstrator module into the present ATLAS TileCal detector for the LHC RUN 2 in Christmas shutdown in 2015 or 2016.

Performance of the final Event Builder for the ATLAS Experiment

Event data from proton-proton collisions at the LHC will be selected by the ATLAS experiment in a three level trigger system, which reduces the initial bunch crossing rate of 40 MHz at its first two trigger levels (LVL1+LVL2) to ~3 kHz. At this rate the Event-Builder collects the data from all read-out system PCs (ROSs) and provides fully assembled events to the the event-filter (EF), which is the third level trigger, to achieve a further rate reduction to ~ 200 Hz for permanent storage. The event-builder is based on a farm of O(100) PCs, interconnected via gigabit Ethernet to O(150) ROSs. These PCs run Linux and multi-threaded software applications implemented in C++. All the ROSs and one third of the event-builder PCs are already installed and commissioned. We report on performance tests on this initial system, which show promising results to reach the final data throughput required for the ATLAS experiment.

FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.

Testing a silicon photomultiplier time-of-flight (TOF) system in Fermilab Test Beam Facility

The first results from a time-of-flight beam test of silicon photomultipliers (SiPm) with quartz Cherenkov radiators obtained in the Fermilab Test Beam Facility are discussed. The timing measurement was performed with commercial electronics that were commissioned in the Fermilab SiPm timing facility. The plan for a new time-of-flight system for the test beam facility, with the goal of obtaining a few tens picosecond time resolution is presented.

Modulator based high bandwidth optical readout for HEP detectors

Optical links will be an integral part of future LHC experiments at various scales from coupled sensors to off-detector communication. We are investigating CW lasers and light modulators as an alternative to VCSELs. Light modulators are small, use less power, have high bandwidth, are reliable, have low bit error rates and are very rad-hard. We present the quality of the links at 10Gbps and the results of radiation hardness measurements for the modulators built based on LiNbO3, InP, and Si. Also we present results on modulator-based free space data links, steered by MEMS mirrors and optical feedback paths for the control loop.

Performance evaluation of multi-pixel photon counters for PET imaging

The multi-pixel photon counter (MPPC), also known as the silicon photo-multiplier (SiPM), is a novel, solid-state photodetector that contains an array of Geiger-mode photodiodes (called microcells below) to a gain in range of 105 -106 when operating at a low voltage of 40-70 V. The device also has relatively high photon detection efficiency (PDE) and fast timing response. It is also compact and insensitive to magnetic fields. These properties of the MPPC has recently created substantial interest in using the device for PET imaging. In this paper, we evaluate and compare the performance properties of three designs of 1times1 mm2 MPPC offered by Hamamatsu for use in PET. We examine the gains of devices, and also their energy and timing resolutions when coupled to LYSO.

A new approach to front-­‐end electronics interfacing in the ATLAS experiment

For new detector and trigger systems to be installed in the ATLAS experiment after LHC Run 2, a new approach will be followed for Front-End electronics interfacing. The FELIX (Front-End LInk eXchange) system will function as gateway connecting: on one side to detector and trigger electronics links, as well as providing timing and trigger information; and on the other side a commodity switched network built using standard technology (either Ethernet or Infiniband). The new approach is described in this paper, and results achieved so far are presented.

Production and commissioning of a large prototype Digital Hadron Calorimeter for future colliding beam experiments

A new detector technology is being developed for future colliding beam experiments that is based on the use of fine-grained calorimetry, to optimize the use of Particle Flow Algorithms (PFAs) in measuring hadronic jets. Instead of traditional tower geometry and energy summation from many sampling layers, the new approach measures energy deposition in 1 cm2 cells on each sampling layer using discriminators. Jets are reconstructed using hit patterns from each layer, combined with information from inner tracking and the electromagnetic calorimeter. We have built a 480,000 channel prototype detector that is based on Resistive Plate Chambers (RPCs) to demonstrate this concept. The development is part of the CALICE Collaboration. The readout system uses a 64-channel custom integrated circuit called DCAL to record hits from each cell and apply a global timestamp. The chips mount directly on sophisticated front-end boards that are not only an integral part of the charge collection of the detector chambers, but also incorporate digital signal transmission, clock and control, and power and ground. The readout of data is serial, multiplexed into high-speed serial streams and sent to a “back-end” VME system for time-sorting and higher-level triggering. The system can be operated with an external trigger or be self-triggered, and can produce trigger signals from the front-end chips. The construction, installation, and commissioning of this prototype system is now complete. We have begun a measurement program using a test beam at Fermilab. An overview of the system is described. Experiences in building this large prototype system are reported. Results from the test beam are presented.