G. Gildenblat

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

This paper describes the latest and most advanced surface-potential-based model jointly developed by The Pennsylvania State University and Philips. Specific topics include model structure, mobility and velocity saturation description, further development and verification of symmetric linearization method, recent advances in the computational techniques for the surface potential, modeling of gate tunneling current, inclusion of the retrograde impurity profile, and noise sources. The emphasis of this paper is on incorporating the recent advances in MOS device physics and modeling within the compact modeling context

The effect of surface treatment on the electrical properties of metal contacts to boron-doped homoepitaxial diamond film

Both doped and undoped homoepitaxial diamond films were fabricated using microwave plasma-enhanced chemical vapor deposition (CVD). The conductivity of the diamond film is strongly affected by the surface treatment. In particular, exposure of film surface to a hydrogen plasma results in the formation of a conductive layer which can be used to obtain linear (ohmic) I-V characteristics of the Au/diamond contacts, regardless of the doping level. It is shown how the proper chemical cleaning of the boron-doped homoepitaxial diamond surface allows the fabrication of Au-gate Schottky diodes with excellent rectifying characteristics at temperatures of at least 400 degrees C.<<ETX>>

SP: an advanced surface-potential-based compact MOSFET model

This work describes an advanced physics-based compact MOSFET model (SP). Both the quasi-static and non-quasistatic versions of SP are surface-potential-based. The model is symmetric, includes the accumulation region, small-geometry effects, and has a consistent current and charge formulation. The surface potential is computed analytically and there are no iterative loops anywhere in the model. Availability of the surface potential in the source-drain overlap regions enables a physics-based formulation of the extrinsic model (e.g. gate tunneling current) and allows for a noise model free of discontinuities or unphysical interpolation schemes. Simulation results are used to illustrate the interplay between the model structure and circuit design.

Analytical approximation for the MOSFET surface potential

Abstract Surface-potential-based models are among the most accurate and physically based compact MOSFET models available today. However, the need for iterative computations of the surface potential limits their computational efficiency, which is critical in CAD applications. The existing closed-form approximations for the surface potential are based on empirical smoothing functions and have the accuracy of about 2–3 mV which is not always adequate for an accurate modeling of MOSFET characteristics, especially transconductances and transcapacitances. In this work, we present and verify an extremely accurate and computationally efficient closed-form approximation, which can serve as a basis for advanced surface-potential-based MOSFET models.

High-temperature thin-film diamond field-effect transistor fabricated using a selective growth method

Selective growth of boron-doped homoepitaxial diamond films was achieved using sputtered SiO/sub 2/ as a masking layer. The hole mobility of selectively grown films varied between 210 and 290 cm/sup 2//V-s for hole concentration between 1.0*10/sup 14/ and 6.9*10/sup 14/ cm/sup -3/. The technique was used to fabricate a thin-film diamond field-effect transistor operational at 300 degrees C. The channel resistance of the device is an exponential function of temperature. In combination with the selective growth method, this device can be used as a starting point for the development of high-temperature diamond-based integrated circuits.<<ETX>>

Measurements and modeling of the n-channel MOSFET inversion layer mobility and device characteristics in the temperature range 60-300 K

Discussed is the use of the high-frequency split C-V method to measure accurately the effective mobility of the n-channel MOS transistor as a function of temperature, bulk charge Q/sub b/, and inversion layer charge Q/sub i/. The experimental data for Q/sub b/ and Q/sub i/ were verified by comparison with the results of numerical simulation. The results of the measurements were used to develop the mobility model, which is accurate in the 60-300 K temperature range. The proposed mobility model incorporates Coulombic, lattice, and surface roughness scattering modes and generalizes the previous model, which was limited to low-temperature operation of the MOSFET. The deviation from the universal (for different back biases) mu (E/sub eff/) dependence, which becomes more pronounced at low temperatures and low E/sub eff/, is included in the model and can be associated with the Coulomb scattering mechanism. The proposed model is verified by comparison of experimental data and simulated MOSFET I-V characteristics for different temperatures. >

High-temperature Schottky diodes with thin-film diamond base

High-temperature (500-580 degrees C) current-voltage (I-V) characteristics of gold contacts to boron-doped homoepitaxial diamond films prepared using a plasma-enhanced chemical vapor deposition (CVD) method are described. Schottky diodes were formed using gold contacts to chemically cleaned boron-doped homoepitaxial diamond films. These devices incorporate ohmic contacts formed by annealing Au(70 nm)/Ti(10 nm) layers in air at 580 degrees C. The experiments with homoepitaxial diamond films show that the leakage current density increases with the contact area. This implies that a nonuniform current distribution exists across the diode, presumably due to crystallographic defects in the diamond film. As a result, Au contacts with an area >1 mm/sup 2/ are essentially ohmic and can be used to form back contacts to Schottky diodes. Schottky diodes fabricated in this matter also show rectifying I-V characteristics in the 25-580 degrees C temperature range.<<ETX>>

Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges

A particularly simple form of the charge-sheet model (CSM) is developed using symmetric linearization of the bulk charge as a function of the surface potential. The new formulation is verified by comparison with the original form of the CSM and is used to obtain a simple and accurate expressions for the quasi-static (QS) terminal charges based on the Ward-Dutton partition. Combined with the spline collocation version of the weighted residuals method, symmetric linearization leads to a relatively simple version of the nonquasi-static (NQS) MOSFET model. The efficiency of the proposed approach to MOSFET modeling is enhanced by taking advantage of the recently developed noniterative algorithm for computing surface potential as a function of the terminal voltages. An important symmetry of the various MOSFET characteristics with respect to the source/drain interchange is preserved in both the QS and NQS versions of the symmetrically linearized CSM.

RF distortion analysis with compact MOSFET models

This paper examines the relation between the structure of a compact MOSFET model and its ability to model harmonic distortion. It is found that non-singular behavior at zero drain bias is essential for qualitatively correct simulations of the third harmonic power dependence. Specifically, nonlinear distortion analysis requires that the Gummel symmetry condition be satisfied by the compact model. A simple procedure to enforce the Gummel symmetry without increasing the complexity of the model is incorporated in an advanced surface-potential-based MOSFET model to enable correct harmonic distortion modeling.

A surface potential-based compact model of n-MOSFET gate-tunneling current

Aggressive scaling of the gate-oxide thickness has made gate-tunneling current an essential aspect of MOSFET modeling. This work presents a novel physics-based compact model of gate current in the n-MOSFET. A simplified version of the Esaki-Tsu formula is developed to calculate the tunneling current density, in which the original integral is approximated to retain the essential physics without sacrificing computational efficiency required in a compact model. The proposed model is surface potential-based in both the channel and source/drain overlap regions. The channel component of the gate current is physically partitioned into the source and drain parts using a symmetrically linearized version of the charge-sheet model. The partition is implemented in analytical form and accounts for the drain bias dependence of the channel component. A small number of adjustable parameters is sufficient to reproduce the experimentally observed bias and geometry dependence of the gate current for several advanced processes.