Colin C. McAndrew

MOSFET effective channel length, threshold voltage, and series resistance determination by robust optimization

MOSFET parameters, such as effective channel length, series resistance, and channel mobility, are important for process control and device design. These parameters are typically obtained from intercepts and slopes of plots of intermediate quantities, such as peak transconductance, derived from I-V data. Commonly, the intercept of a plot is found by extrapolation. However, the extrapolation process is sensitive to measurement errors. In addition, the plots often show nonlinear behavior, hence slopes and intercepts cannot be determined accurately. It is shown how these problems can be overcome by using a nonlinear optimization procedure to determine those MOSFET parameters, by explicitly identifying them as the parameters of a simple, widely used MOSFET model that is a good approximation in the triode region of operation. The results of five tests of robustness and accuracy that show that the method is significantly more accurate and robust than a number of other methods are presented. >

A single-piece C/sub infinity /-continuous MOSFET model including subthreshold conduction

A simple yet powerful technique that transforms regional compact (algebraic) MOSFET models into single-piece C/sub infinity /-continuous models is introduced. The technique significantly improves MOSFET models by removing kinks and glitches at the boundaries between the subthreshold, triode, and saturation regions of operation. In addition, the technique adds subthreshold conduction modeling to models that lack such a capability. The authors show the technique by extending a simple MOSFET model, which is three piece and does not model subthreshold conduction, to become a single-piece model that includes subthreshold conduction.<<ETX>>

A complete and consistent electrical/thermal HBT model

GaAs heterojunction bipolar transistor (HBT) circuits with significant self-heating must be analyzed using coupled electrical and thermal simulation. The author presents a complete, consistent, coupled electrical/thermal model for such devices. The model is applicable to DC, AC, transient large-signal steady-state, noise and stability analyses. Examples of the effects of self-heating on device performance are given. The coupled model is necessary to model GaAs HBT behavior properly when devices are biased at high power dissipation.<<ETX>>

A C/sub infinity /-continuous depletion capacitance model

The p-n junction depletion capacitance models of the SPICE and ADVICE circuit simulators are regional models that have discontinuities in high-order derivatives. This limits the order of integration that can be used for transient analyses, and can limit both the size of time steps that can be used during transient analyses and the accuracy of distortion analyses. In addition, the SPICE and ADVICE depletion capacitance models unphysically predict that the depletion charge increases without bound as applied forward bias increases. An improved depletion capacitance model that overcomes these problems is presented. The model is charge-based, single-piece, and C/sub infinity /-continuous, and has a finite maximum junction depletion charge under forward bias. >

Improved circuit technique to reduce h/sub fe/ degradation in bipolar output drivers

h/sub fe/ degradation in bipolar transistors caused by reverse V/sub be/ stress decreases the reliability of BiCMOS circuits. In this paper, we present an improved circuit technique to limit reverse V/sub be/, and thus significantly increase BiCMOS reliability. The technique also reduces the base-emitter breakdown voltage constraint on BiCMOS technology design. >

Accurate characterization of MOSFET overlap/fringing capacitance for circuit design

In this paper we present a new, accurate method to characterize MOSFET overlap/fringing capacitance C/sub of/. Existing methods determine C/sub of/ independent of the intrinsic gate capacitance, and so do not model total gate capacitance C/sub g-sdb/ correctly. Our method determines C/sub of/ to fit C/sub g-sdb/ optimally, which is the proper goal of C/sub of/ characterization for circuit design. We also present test structures, measurement techniques, and results of both C-V and s-parameter measurements.<<ETX>>

SPICE Early modeling [bipolar transistors]

Gives the real reason for the approximations made in the SPICE Gummel-Poon model Early effect formulation, and a new consistent, coupled method to determine forward and reverse Early voltages of bipolar junction transistors accurately.

BiCMOS h/sub fe/ degradation: causes and circuit solution

h/sub fe/ degradation decreases BiCMOS speed and reliability. This paper presents the physical mechanisms of h/sub fe/ degradation, and a new, simple circuit technique that increases BiCMOS reliability and allows BiCMOS technologies to have lower breakdown voltages.

MOSFET effective channel width determination by nonlinear optimization

Abstract Accurate determination of MOSFET effective channel width Weff is important for process control and device design. Existing methods to determine Weff are sensitive to measurement noise, and to nonlinearities in the data. In this paper we present a new method to determine Weff that overcomes these problems. The method uses nonlinear optimization, and is based on a drain current model that accounts for the variations of Weff, of series resistance, and of threshold voltage, with masked channel width and gate bias. We also show that our new method is more accurate and less sensitive to measurement procedure than other methods.