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Dive into the research topics where G. Sarrabayrouse is active.

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Featured researches published by G. Sarrabayrouse.


IEEE Transactions on Circuits and Systems | 2008

Advanced Low-Noise X-Ray Readout ASIC for Radiation Sensor Interfaces

Thomas Noulis; S. Siskos; G. Sarrabayrouse; Laurent Bary

A VLSI readout front-end architecture, dedicated for X-ray imaging, using specific capacitive silicon detectors, with capacitance ranging from 2 to 10 pF, is described. Critical design issues such as the noise optimization and the shaper implementation technique are addressed and the first performance - test results of a fabricated prototype in a 0.35-mum 3.3-V CMOS process, are presented. Important feature of the design is the novel CR - RC2 pulse-shaper configuration since in this section, transconductor circuits are used in order to provide a broad range of continuous variable peaking time, programmable gain and adjustable undershoot while still maintaining the noise performance and the required linearity of the specific radiation detection application. Regarding the readout ASIC performance characteristics, the power consumption is 1 mW per channel, the equivalent noise charge at 1.81-mus peaking time is 382 e- plus 21 e- per picofrard of detector capacitance. The topology achieves a conversion gain equal to 3.31 mV/fC and a linearity of 0.69%.


Materials Science and Engineering B-advanced Functional Solid-state Materials | 1996

Structural and electrical investigations of silicon wafer bonding interfaces

Mourad Benamara; A. Rocher; P. Sopéna; A. Claverie; Angéline Laporte; G. Sarrabayrouse; Lionel Lescouzeres; Andre Peyre-Lavigne

Abstract The structure and the electrical properties of Si/Si interfaces obtained by wafer bonding are studied by transmission electron microscopy (TEM), electron-beam-induced current (EBIC) and spreading resistance (SR). Boron-doped Czochralsky-silicon (Cz-Si) (001) wafers and float zone-silicon (FZ-Si) (001) wafers are bonded after hydrophobic cleaning of the surfaces and annealed at 1200 °C for 2 h. The TEM experiments show that these interfaces are made of two dislocation networks: a grid of screw dislocations accommodating the misorientation between the two wafers and a set of 60 ° dislocations compensating a tilt component related to the vicinal surfaces. These dislocations are all located at the interface and no extended defects propagate in the Si wafers. The EBIC experiments show a large electrical activity of the Cz interfaces; SR profiles show a variation of carriers concentration near the interface. Large density of oxide precipitates located at the interface are seen for Cz-Si wafers. EBIC observations performed on FZ wafer show a weak electrical activity which seems to be related to a low content of oxygen in the interface.


MRS Proceedings | 1995

Atomic Structure of the Interfaces Between Silicon Directly Bonded Wafers

Mourad Benamara; A. Rocher; A. Laporte; G. Sarrabayrouse; Lionel Lescouzeres; Andre Peyre-Lavigne; M Fnaiech; A. Claverie

The so-called Direct Wafer Bonding (DWB) technique opens new possibilities for the electronic industry but still suffers from the poor knowledge we have of the microstructure of these interfaces and hence of their electrical activity. In this work, we have extensively used Transmission Electron Microscopy techniques in plan-view and cross-section to identify the structure of the interfaces found between two bonded silicon wafers. The general structure of these interfaces is that of a perfect grain boundary and evidently depends on the misorientation between the two bonded wafers. A twist component in the range 0>θ>13° creates a square network of pure screw dislocation whereas an unavoidable tilt component (<0.5°) is compensated by a periodic array of 60° dislocation lines perpendicular to the tilt direction. Therefore, the regularity of these networks can be disrupted by the presence of steps (of up to several nanometers) in the interface plane. Silicon oxide precipitates are seen heterogeneously distributed on the interface with preferential nucleation sites on the dislocations.


Iet Circuits Devices & Systems | 2008

Noise optimised charge-sensitive CMOS amplifier for capacitive radiation detectors

Thomas Noulis; S. Siskos; G. Sarrabayrouse

A low-voltage, low-noise, charge-sensitive preamplifier (CSA) for particle tracking using a silicon strip detector was designed. The preamplifier was optimised in terms of the total output noise performance using a noise minimisation technique based on the MOSFET noise small signal equivalent circuit and readout front-end noise optimisation criteria valid in the strong inversion region. The preamplifier was designed and fabricated in a 0.35 m CMOS process by Austria Mikro Systeme for a specific silicon strip detector of 2 pF capacitance for X-ray spectroscopy. The circuit exhibits satisfactory performance compatible to the specific low-energy radiation detection application. Particularly, the CSA provides an equivalent noise charge of 254 e + 13.5+e - /pF, consumes 165 muW and achieves an output conversion gain equal to 2.81 mV/fC and a linearity <0.57 . Analysis is supported by extensive measurement results confirming the circuit characteristics and their flexibility to be used in a variety of readout applications.


Thin Solid Films | 1996

Characteristics of the thermal oxidation of heavily boron-doped polycrystalline silicon thin films

M. Boukezzata; D. Bielle-Daspet; G. Sarrabayrouse; F. Mansour

Abstract Dry oxidation kinetics were compared for 2 × 10 20 cm −3 boron-implanted and in-situ doped films deposited at temperatures ranging between 520 and 620 °C. The characteristics of the thermal oxidation of these films have been studied over the oxidation temperature range of 750 to 1 050 °C and for durations of 10 min to 26 h. High values of both the surface oxidation rate k s and the oxide diffusion coefficient D are evidenced as typical of the in-situ doped films. In addition to the well-known effect that heavy doping increases the rate of oxidation similar to what is observed in single-crystal silicon, it is also shown specially, for the in-situ boron-doped films compared with 2 × 10 20 cm −3 in-situ phosphorus-doped ones, that the greatest oxidation rate is observed at high oxidation temperatures ( T ox > 1 000 °C ). This enhancement is related to some specific factors of these materials, such as grain boundary structures, defects, texture and electrical properties related to the segregation and supersaturation phenomenon which occur at these levels of doping.


Solid-state Electronics | 2001

Feasibility of an isolation by local oxidation of silicon without field implant

J.L Fay; Jean Beluch; B Despax; G. Sarrabayrouse

Abstract Field inversion in local oxidation of silicon regions of a CMOS integrated circuit is generally avoided thanks to a field implant. In this paper the feasibility of an implant-free isolation is studied. The parasitic charge in the interlayer dielectrics is attributed to the diffusion during nitride deposition of hydrogen which react with carbon in the underlying plasma oxide. Using a PECVD nitride as the upper layer of the inter-layer dielectrics allows to maintain the leakage current at an acceptable level.


Microelectronics Reliability | 2001

Reduction of boron penetration through thin silicon oxide with a nitrogen doped silicon layer

Laurent Jalabert; Pierre Temple-Boyer; G. Sarrabayrouse; F. Cristiano; B. Colombeau; F. Voillot; C. Armand

Abstract This paper deals with the development of the disilane Si 2 H 6 gaseous source for gate technology and more precisely, reports on the use of nitrogen doped silicon (NIDOS) deposited from disilane and ammonia for the realisation of polycrystalline gate. Boron diffusivity into the NIDOS films is studied thanks to SIMS experiments, and results are extended to the fabrication of P + -poly-Si/NIDOS/SiO 2 /Si capacitive structures. Electrical characterisations evidenced finally the influence of boron and nitrogen atoms on the electrical properties of PMOS devices.


IEEE Transactions on Electron Devices | 1993

Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology

Marise Bafleur; Juan Buxo; Manuel Vidal; Ph. Givelin; V. Macary; G. Sarrabayrouse

An original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology is presented. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up. >


conference on ph.d. research in microelectronics and electronics | 2006

Programmable OTA Based CMOS Shaping Amplifier for X-rays Spectroscopy

Thomas Noulis; C. Deradonis; S. Siskos; G. Sarrabayrouse

An IC readout front end system for space applications X-rays silicon strip detectors is presented. The system semi-Gaussian shaper is based on CMOS operational transconductance amplifiers (OTA) and is implemented using advanced design techniques. This innovative architecture provides a broad range of continuously variable peaking time, adjustable undershoot and programmable gain. The noise performance, the bandwidth and the output signal undershoot are also analytically examined. The system was designed in 0.6mum process by Austria Mikro Systeme. Simulation results using HSPICE (BSIM3V3.2 model) support the theoretical analysis and confirm the system capability to be used in a variety of readout applications


mediterranean electrotechnical conference | 2006

Novel fully integrated OTA based front-end analog processor for X-rays silicon strip detectors

Thomas Noulis; C. Deradonis; S. Siskos; G. Sarrabayrouse

A space application fully integrated preamplifier - shaper system for X-rays silicon strip detectors is developed. An operational transconductance amplifier (OTA) based shaper architecture with continuous variable peaking time and programmable gain is designed using advanced filter design techniques. Considerations about the noise performance, the bandwidth and the output signal processing flexibility are also presented. The system was designed in 0.6 mum AMS process. Analysis is supported by simulation results, which confirm the exceptional system performance

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S. Siskos

Aristotle University of Thessaloniki

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Thomas Noulis

Aristotle University of Thessaloniki

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A. Claverie

Centre national de la recherche scientifique

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C. Deradonis

Aristotle University of Thessaloniki

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M. Fragopoulou

Aristotle University of Thessaloniki

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M. Zamani

Aristotle University of Thessaloniki

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