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Dive into the research topics where Gabriel Robins is active.

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Featured researches published by Gabriel Robins.


SIAM Journal on Discrete Mathematics | 2005

Tighter Bounds for Graph Steiner Tree Approximation

Gabriel Robins; Alexander Zelikovsky

The classical Steiner tree problem in weighted graphs seeks a minimum weight connected subgraph containing a given subset of the vertices (terminals). We present a new polynomial-time heuristic that achieves a best-known approximation ratio of


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1992

A new class of iterative Steiner tree heuristics with good performance

Andrew B. Kahng; Gabriel Robins

1 + \frac{\ln 3}{2} \approx 1.55


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1992

Provably good performance-driven global routing

Jason Cong; Andrew B. Kahng; Gabriel Robins; Majid Sarrafzadeh; C. K. Wong

for general graphs and best-known approximation ratios of


ieee international conference on pervasive computing and communications | 2007

Physically Unclonable Function-Based Security and Privacy in RFID Systems

Leonid Bolotnyy; Gabriel Robins

\approx 1.28


design automation conference | 1991

High-performance clock routing based on recursive geometric matching

Andrew B. Kahng; Jason Cong; Gabriel Robins

for both quasi-bipartite graphs (i.e., where no two nonterminals are adjacent) and complete graphs with edge weights 1 and 2. Our method is considerably simpler and easier to implement than previous approaches. We also prove the first known nontrivial performance bound (


european design automation conference | 1995

Performance-oriented placement and routing for field-programmable gate arrays

Michael J. Alexander; James P. Cohoon; Gabriel Robins

1.5 \cdot


international conference on computer design | 1993

Fidelity and near-optimality of Elmore-based routing constructions

Kenneth D. Boese; Andrew B. Kahng; Bernard A. McCoy; Gabriel Robins

OPT) for the iterated 1-Steiner heuristic of Kahng and Robins in quasi-bipartite graphs.


Vlsi Design | 1998

Placement and Routing for Performance-Oriented FPGA Layout

Michael J. Alexander; James P. Cohoon; Gabriel Robins

A fast approach to the minimum rectilinear Steiner tree (MRST) problem is presented. The method yields results that reduce wire length by up to 2% to 3% over the previous methods, and is the first heuristic which has been shown to have a performance ratio less than 3/2; in fact, the performance ratio is less than or equal to 4/3 on the entire class of instances where the ratio c(MST)/c(MRST) is exactly equal to 3/2. The algorithm has practical asymptotic complexity owing to an elegant implementation which uses methods from computation geometry and which parallelizes readily. A randomized variation of the algorithm, along with a batched variant, has also proved successful. >


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1994

Closing the gap: near-optimal Steiner trees in polynomial time

Jeff Griffith; Gabriel Robins; Jeffrey S. Salowe; Tongtong Zhang

The authors propose a provably good performance-driven global routing algorithm for both cell-based and building-block design. The approach is based on a new bounded-radius minimum routing tree formulation. The authors first present several heuristics with good performance, based on an analog of Prims minimum spanning tree construction. Next, they give an algorithm which simultaneously minimizes both routing cost and the longest interconnection path, so that both are bounded by small constant factors away from optimal. They also show that geometry helps in routing: in the Manhattan plane, the total wire length for Steiner routing improves to 3/2*(1+(1/ epsilon )) times the optimal Steiner tree cost, while in the Euclidean plane, the total cost is further reduced to (2/ square root 3)*(1+(1/ epsilon )) times optimal. The method generalizes to the case where varying wire length bounds are prescribed for different source-sink paths. Extensive simulations confirm that this approach works well. >


design automation conference | 1995

New Performance-Driven FPGA Routing Algorithms

Michael J. Alexander; Gabriel Robins

Radio frequency identification (RFID) is an increasingly popular technology that uses radio signals for object identification. Tracking and authentication in RFID tags have raised many privacy and security concerns. On the other hand, known privacy and security cryptographic defenses are too hardware-expensive to incorporate into low-cost RFID tags. In this paper, we propose hardware-based approaches to RFID security that rely on physically unclonable functions (PUFs). These functions exploit the inherent variability of wire delays and parasitic gate delays in manufactured circuits, and may be implemented with an order-of-magnitude reduction in gate count as compared with traditional cryptographic functions. We describe protocols for privacy-preserving tag identification and secure message authentication codes. We compare PUFs to digital cryptographic functions, address other uses of PUFs to enhance RFID security and suggest interesting directions for future research. The proposed solutions are efficient, practical, and appropriate for low-cost RFID systems

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Jason Cong

University of California

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Yu Chen

University of California

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