Gary E. Flores

Investigation of the properties of photosensitive polyimide films

Modem package designs generate a large amount of stress on the die which can be controlled using a thick film of polyimide over the passivation layer. Polyimide film thicknesses in excess of twenty microns at exposure are becoming common for very thin packages. The standard polyimide lithographic process frequently utilizes a trilayer film consisting of an adhesion layer, a polyimide film, and photoresist. A major advance in polyimide technology occurred with the introduction of photosensitive polyimide materials. These materials reduce the total number of process steps in the polyimide process. They also offer the opportunity to combine the passivation and polyimide lithography steps into one process level resulting in significant process simplification and manufacturing cost reduction. Consequently, there is a rapid increase in the use of photosensitive polyimides in the semiconductor industry. There are a number of important issues associated with photosensitive polyimide processing. Because most photosensitive polyimides are negative tone, residual film formation has a major impact on resolution and the usable process window. The high exposure doses required for thicker polyimide films exacerbates the residual film problem. Also, resolving small features such as fuse windows in DRAMs is frequently required in thick photosensitive polyimide layers. These small features result in polyimide height-to-linewidth aspect ratios that are comparable to many photoresist applications. Because of these requirements, photosensitive polyimide applications could benefit from detailed process characterization to enhance resolution and increase process latitude. Unfortunately, there is scant literature pertaining to lithographic performance and lithographic process modeling for photosensitive polyimide films. An extension of basic photoresist characterization techniques for thin films can be applied to thick photosensitive polyimide processes. The develop rate characteristics and lithographic performance for several commercial photosensitive polyimide products were studied at a thickness of 12 microns. Cross sectional SEM analysis, Bossung plots, and film retention plots are used to establish relative lithographic capabilities. These experimental results are used to study the effects of polyimide physical and chemical properties on lithographic performance.

Lithographic performance of a new generation i-line optical system: a comparative analysis

A new generation i-line optical stepper utilizing the established benefits of the 1x Wynne- Dyson lens design has been developed for mix-and-match lithography. Based on the advantages of cost of ownership and high throughput capability, the Ultratech 2244i was specifically designed as a cost effective approach to complement high NA reduction steppers in a mix-and-match environment, especially for high volume DRAM and ASIC manufacturing. This system features an ultra-large image field of 22 X 44 mm with a 0.32 numerical aperture lens with an illumination bandwidth of 20 nanometers (355 to 375 nm). As a result, this system provides 0.8 micrometers manufacturing capability. These features provide improved critical dimension (CD) interference effects and superior depth-of-focus for the 2244i.

Application of pattern recognition in mix-and-match lithography

Mix-and-match lithography continues to gain acceptance as a valuable strategy for reducing capital costs and increasing throughput productivity in semiconductor manufacturing. The successful implementation of mix-and-match lithography requires consideration of the unique characteristics of all systems being matched. Among these issues are alignment target placement and alignment strategy. The alignment system for each stepper manufacturer uses specially designed targets for wafer alignment. However, the wafer area available for dedicated alignment targets is typically restricted to maximize the quantity of production die per wafer. One approach to remove the target area limitation is to implement an alignment system based on pattern recognition techniques. Using pattern recognition, the optical image of a specified field structure is digitized and interpreted as an alignment target. Since pattern recognition has the potential to learn and interpret various structures, it provides great flexibility for using alignment structures from other steppers or possibly device structures. This capability minimizes the wafer area required for alignment targets. Typically, there are two steps involved in wafer alignment in mix-and-match lithography. First is wafer global alignment which is necessary to remove coarse grid placement errors due to wafer loader matching. The second step is the fine or precision alignment of the stepper field prior to exposure. A pattern recognition system provides the capability for either or both of these alignment procedures. In this study, a pattern recognition system on a Ultratech 2244i stepper is used to demonstrate the elimination of global alignment targets for mix-and-match lithography. The characterization wafers are patterned with a 5x reduction stepper for the first level. Using the first level wafers from this stepper, a performance comparison is made to evaluate the flexibility of the pattern recognition system on a variety of pattern features and substrate films for global alignment. The pattern recognition repeatability and reliability for the case of global alignment is determined. In addition, the MVS capture time and the robustness of the MVS search routines are evaluated as a function of global grid errors.

Efficient overlay optimization of stepper correctables

A crucial aspect of overlay optimization is proper selection of stepper input corrections. Automated metrology systems provide the ability to rapidly amass extensive overlay data on lithography systems and processes. The data can then be used to provide feedback in the form of stepper input correction terms to improve overlay. A common approach is an analysis of the overlay data using conventional grid and lens models to determine apparent corrections to be applied to the stepper. However, the standard models do not necessarily account for all the variability in the measured data. Determination of optimal corrections is further complicated by cross-correlation of the stepper input correctable terms. In these cases, the simple application of the grid and lens modeled terms will not provide optimal results. The use of efficient experimental design techniques can reduce the large uncertainty involved in determining and applying these stepper input corrections. Using traditional experimental factorial and response surface design techniques, a descriptive model was developed for the six grid correction terms. The resulting empirical model was generated by using a six factor Box-Behnken experimental design. Multiple wafers were run at these conditions and overlay was measured using an automated metrology system. This empirical model was used to derive the optimal set of inputs to the stepper. This descriptive model is compared with input settings determined from a conventional grid model.

Monitoring and Diagnostic Techniques for Control of Overlay in Steppers

Semiconductor lithography manufacturing presents a major challenge for the application of classical Statistical Process Control (SPC) methodologies due to the complex nature of this process. For example, difficulties can occur due to inadequate data sampling, nonnormal error distributions, equipment or process instability and nonstationary random errors. Incorrect use of classical SPC techniques can result in the incorrect interpretation of process stability which can have a drastic impact on productivity. Photolithography provides additional SPC challenges due to the inherent multivariable nature of the output variables that are being controlled. This paper examines appropriate SPC and monitoring techniques for stepper control of overlay performance using in-process measurement and analysis equipment to address these issues. The average run length of three charting techniques is compared to quantify the ability of each technique to detect process mean shifts. Shewart, Exponentially Weighted Moving-Average (EWMA) and Cumulative-Sum (CUSUM) charts are analyzed for a baseline process and mean shifts of 0.42, 0.85 and 1.25 standard deviations. These results illustrate the superior performance of a CUSUM chart over Shewart and EWMA charts. In addition, the Shewart chart with Western Electric rules produced false mean shift alarms for the baseline case. The EWMA is also observed to be sensitive to the selection of weighting factors. The effectiveness of plotting individual wafers is compared with plotting lot means. The plotting of individual wafers outperforms lot means in the determination of baseline shifts because of the larger population size of the individual charts.

Optimized registration model for 2:1 stepper field matching

In this study, a large field 1x stepper was matched to an advanced 5x reduction stepper using a 2:1 field matching scheme. The 1x field is a 44 X 22 mm rectangle that is symmetrically aligned to two 22 X 22 mm 5x reduction fields. Overlay measurements were collected at 33 sites per reduction field (or 66 sites per Ultratech field) and the resulting data was analyzed using a modified grid registration model that fully supports the 2:1 matching geometry. Two complementary optimization techniques were developed, the first of which assumes corrective action only on the 1x stepper. The more sophisticated approach supports corrective action on both the 1x and 5x reduction stepper. Next, both techniques were applied to the measured mix-and-match data with the results suggesting a specific set of corrective action that could be applied to the 1x and 5x reduction steppers. Based on these results, it was found that there is a substantial registration benefit to exerting simultaneous corrections on both stepper types as opposed to controlling each stepper individually.

Photoresist thin-film effects on alignment process capability

Two photoresists were selected for alignment characterization based on their dissimilar coating properties and observed differences on alignment capability. The materials are Dynachem OFPR-800 and Shipley System 8. Both photoresists were examined on two challenging alignment levels in a submicron CMOS process, a nitride level and a planarized second level metal. An Ultratech Stepper model 1500 which features a darkfield alignment system with a broadband green light for alignment signal detection was used for this project. Initially, statistically designed linear screening experiments were performed to examine six process factors for each photoresist: viscosity, spin acceleration, spin speed, spin time, softbake time, and softbake temperature. Using the results derived from the screening experiments, a more thorough examination of the statistically significant process factors was performed. A full quadratic experimental design was conducted to examine viscosity, spin speed, and spin time coating properties on alignment. This included a characterization of both intra and inter wafer alignment control and alignment process capability. Insight to the different alignment behavior is analyzed in terms of photoresist material properties and the physical nature of the alignment detection system.

Evaluation of a silicon trench alignment target strategy

An evaluation of an optical lithography alignment target strategy based on a trench structure dry etched in a silicon substrate prior to device fabrication is presented. Use of this silicon trench target provides a robust target which is necessary for alignment of difficult layers on processes employing multilevel metallizations with planarizing dielectric films. In comparison the use of other targets schemes are less effective on steppers that utilize a darkfield alignment technique when aligning these difficult backend metal process layers. Additional motivation for this study is the requirement of tighter overlay specifications at all levels as device geometries are reduced to the submicron region. This silicon trench target scheme minimizes the total root mean square overlay budget by aligning all process layers to the silicon trench target. Therefore this technique can effectively enhance efforts to scale device dimensions. In this study the effects of target polarity target dimensions target design and silicon etch depth of the target on process alignment latitude are shown for a submicron CMOS process of three layers of metallizations with intermetal planarizing dielectric films. The selection of thin films deposited over the silicon trench target during the process sequence was also optimized to enhance the silicon trench target. The process alignment latitude results of this evaluation are based on an assessment of alignment target signal integrity including signal to noise ratio and target symmetry. In addition quantification

Investigation of the properties of thick photoresist films

Process simulation and modeling techniques have demonstrated significant success in predicting the behavior of optical lithography for semiconductor processes with photoresist thicknesses below 2 microns. An extension of these same principles and methods has been applied to thick resist process up to 10 microns. This study examines the use of simulation analysis in conjunction with experimental results to study the effects of photoresist film thickness and photoresist properties on lithographic performance. The simulation results examine various photoresist model parameters and their impact on typical lithographic process indicators such as depth of focus and exposure latitude. These results show the importance of the photoresist absorption parameter A (micrometers -1) and the developer selectivity n in determining lithographic performance. High values of n provide increased process latitude, while low values of A reduce the required exposure energy.

Reticle correction technique to minimize lens distortion effects

In this study, the distortion signature of an Ultratech 2244i lens was measured using an advanced registration measurement system. A correction for this distortion signature was applied to the design database and a mix-and-match test reticle fabricated. In order to quantify the effectiveness of this technique, a mix-and-match overlay study was performed using the same Ultratech 2244i and an advanced 5x reduction stepper. Overlay experiments were performed using both corrected and noncorrected reticles on the Ultratech system. An automated metrology system was used to collect overlay measurements distributed over the entire lens field area. Detailed analysis of the lens intrafield component of the overlay error using both reticles illustrates the advantages of applying reticle distortion corrections.