Gek Soon Chua

Optimization of mask shot count using MB-MDP and lithography simulation

In order to maintain manageable process windows, mask shapes at the 20nm technology node and below become so complex that mask write times reach 40 hours or might not be writeable at all since the extrapolated write time reaches 80 hours. The recently introduced Model Based Mask Data Preparation (MB-MDP) technique is able to reduce shot count and therefore mask write time by using overlapping shots. Depending on the amount of shot count reduction the contour of the mask shapes is changed leading to the question how the mask contour influences wafer performance. This paper investigates the tradeoff between mask shot count reduction using MB-MDP and wafer performance using lithography simulation. A typical Source-Mask-Optimization (SMO) result for a 20nm technology will be used as an example.

Model-based virtual VSB mask writer verification for efficient mask error checking and optimization prior to MDP

A methodology is described wherein a calibrated model-based ‘Virtual’ Variable Shaped Beam (VSB) mask writer process simulator is used to accurately verify complex Optical Proximity Correction (OPC) and Inverse Lithography Technology (ILT) mask designs prior to Mask Data Preparation (MDP) and mask fabrication. This type of verification addresses physical effects which occur in mask writing that may impact lithographic printing fidelity and variability. The work described here is motivated by requirements for extreme accuracy and control of variations for today’s most demanding IC products. These extreme demands necessitate careful and detailed analysis of all potential sources of uncompensated error or variation and extreme control of these at each stage of the integrated OPC/ MDP/ Mask/ silicon lithography flow. The important potential sources of variation we focus on here originate on the basis of VSB mask writer physics and other errors inherent in the mask writing process. The deposited electron beam dose distribution may be examined in a manner similar to optical lithography aerial image analysis and image edge log-slope analysis. This approach enables one to catch, grade, and mitigate problems early and thus reduce the likelihood for costly long-loop iterations between OPC, MDP, and wafer fabrication flows. It moreover describes how to detect regions of a layout or mask where hotspots may occur or where the robustness to intrinsic variations may be improved by modification to the OPC, choice of mask technology, or by judicious design of VSB shots and dose assignment.

Cost effective application of advanced computational lithography techniques using flexible mask optimization

The 2x nm technology node, with its very low k1 values using immersion lithography is made possible by using advanced computational lithography. Computational techniques such as accounting for 3D effects (including mask topography, wafer sub-layers and resist profiles) in OPC models, the use of model based assist feature placements and the application of process window based OPC solvers have become essential for addressing critical patterning issues. Although these methods can be complex and computationally expensive there is a cost effective application using a framework known as flexible mask optimization or FMO [1,2]. In this study, we show a successful demonstration of such an approach for an advanced technology node using FMO. In the typical OPC development period, various issues may be found which require additional fine tuning. However, each adjustment of the OPC recipe can have unintended consequences in other parts of the chip. This iterative nature of tuning to correct one design area, only to have to then correct a new design area as a consequence, can be endless and very costly. With this FMO flow, critical patterns were identified, classified and corrected using advanced techniques only in localized areas. FMO uses a model based method to ensure defect free boundaries and guarantees that no hotspots are generated as a result of using multiple correction methods on the same layout. The key advantage for FMO is enabling the application of advanced OPC techniques only where necessary. This study demonstrates flows using various case studies on different types of defects and correction methods. The data shows that by using the FMO approach the critical patterns were corrected with defect free boundaries. Mask rule checks (MRC) for main patterns and SRAF are shown clean for all cases. The cost benef

Intra field CD uniformity correction by Scanner Dose MapperTM using Galileo® mask transmission mapping as the CDU data source

Intra-field CD variation can be corrected through wafer CD feedback to the scanner in what is called the Dose Mapper (DOMA) process. This will correct errors contributed from both reticle and scanner processes. Scanner process errors include uncorrected illumination non uniformities and projection lens aberration. However, this is a tedious process involving actual wafer printing and representative CD measurement from multiple sites. A novel method demonstrates that measuring the full-field reticle transmission with Galileo® can be utilized to generate an intensity correction file for the scanner DOMA feature. This correction file will include the reticle transmission map and the scanner CD signature that has been derived in a preliminary step and stored in a database. The scanner database is periodically updated after preventive maintenance with CD from a monitoring reticle for a specific process. This method is easy to implement as no extra monitoring feature is needed on the production reticle for data collection and the new reticle received can be immediately implemented to a production run without the need for wafer CD data collection. Correlation of the reticle transmission and wafer CD measurement can be up to 90% depending on the quality of CD data measurements and repeatability of the scanner signature. CD mapping on the Galileo® tool takes about 20 minutes for 1500 data points (there is no limit to the number of measurement point on the Galileo®), which is more than enough for the DOMA process. Turn Around Time (TAT) for the whole DOMA process can thus be shortened from 3 Days to about an hour with significant savings in time and resources for the fab.

EUV OPC modeling and correction requirements

In this paper we discuss the EUV OPC modeling challenges and potential solutions, as well as OPC integration requirements to support the forthcoming application of EUV lithography. 10-nm-node OPC modeling is considered as an example. Wafer and mask process data were collected for calibration and verification patterns, to understand the mask making error/OPC model interactions. Several factors, including compact mask topography modeling impact, were analyzed by means of rigorous simulations and model fitting. This was performed on a large-scale data set, to ensure accurate characterization of the OPC modeling strategies, using a large number of patterns.

Entering mask process correction era for EUV mask manufacturing

The 50keV ebeam exposure of EUV blanks leads to additional electron backscattering from the tantalum layer and the mirror portion of the blank substrate that cannot be adequately corrected by in-tool algorithms. Coupling this additional backscatter with process effects, such as develop and etch micro/macro loading, results in significant systematic Critical Dimension (CD) errors for through pitch and linearity patterns on EUV masks. In wafer production EUV masks are targeted as single layer exposure, which requires extremely stringent CD control. The systematic CD errors can easily exceed the CD requirements of a typical EUV mask, facilitating the need for a correction scheme or mask process correction (MPC). AMTC and GLOBALFOUNDRIES have started a program to evaluate MPC solutions and drive improvements. Working closely with companies that provide solutions for ebeam and process modelling along with the corresponding correction, we have completed several iterations of MPC evaluations. Specifically, we have tested different equipment, processes and process partitioning for model calibration including a verification of the results. We report on the results of these evaluations, which include simulation of available models, as well as verification data from mask prints. We conclude by summarizing the current capabilities of available MPC solutions and present the remaining gaps for model and correction accuracy as well as the remaining questions for fully implementing MPC into the process landscape.

Radial segmentation approach for contact hole patterning in 193 nm immersion lithography

In this paper, a novel optical proximity correction (OPC) method for contact hole patterning is demonstrated. Conventional OPC for contact hole patterning involves dimensional biasing, addition of serifs, and sub resolution assist features (SRAF). A square shape is targeted in the process of applying conventional OPC. As dimension of contact hole reduces, features on mask appear to be circular due to strong diffraction effect. The process window enhancement of conventional OPC approach is limited. Moreover, increased encounters of side lobes printing and missing contact holes are affecting the process robustness. A new approach of changing the target pattern from square to circular is proposed in this study. The approach involves a change in shape of mask openings and a radial segmentation method for proximity correction. The contact holes patterns studied include regular contact holes array and staggered contact holes. Process windows, critical dimension (CD) and aerial image contrast is compared to investigate the effectiveness of the proposed contact holes patterning approach relative to conventional practice.

Preliminary results for photomask haze mitigation in a fab environment

A persistent industry problem impacting photomask yield and costs has been haze formation. The haze nucleation and growth phenomenon on critical photomask surfaces has periodically gained attention as it has significantly impacted wafer printability for different technology nodes over the years. A number of process solutions have been promoted in the semiconductor industry which has been shown to suppress or minimize the propensity for haze formation, but none of these technologies can stop every instance of haze. Thus some capability will always be needed to remove haze on photomasks with their final pellicles mounted both at the manufacture and long term maintenance stages of a masks lifetime. A novel technology is reviewed here which uses a dry (no chemical effluents) removal system to sweep the entire printable region of a pelliclized photomask to eliminate all removable haze regardless of the mask substrate materials or the presence of critical patterns. An operational process technique for this system and performance in removal is shown for haze located on the mask pattern surface. Finally, preliminary data from tool acceptance and preliminary use in a production environment will also be reviewed.

Mask model calibration for MPC applications utilizing shot dose assignment

Shrinking feature sizes and the need for tighter CD (Critical Dimension) control require the introduction of new technologies in mask making processes. One of those methods is the dose assignment of individual shots on VSB (Variable Shaped Beam) mask writers to compensate CD non-linearity effects and improve dose edge slope. Using increased dose levels only for most critical features, generally only for the smallest CDs on a mask, the change in mask write time is minimal while the increase in image quality can be significant. However, this technology requires accurate modeling of the mask effects, especially the CD/dose dependencies. This paper describes a mask model calibration flow for Mask Process Correction (MPC) applications with shot dose assignment. The first step in the calibration flow is the selection of appropriate test structures. For this work, a combination of linespace patterns as well as a series of contact patterns are used for calibration. Features sizes vary from 34 nm up to several micrometers in order to capture a wide range of CDs and pattern densities. After mask measurements are completed the results are carefully analyzed and measurements very close to the process window limitation and outliers are removed from the data set. One key finding in this study is that by including patterns exposed at various dose levels the simulated contours of the calibrated model very well match the SEM contours even if the calibration was based entirely on gauge based CD values. In the calibration example shown in this paper, only 1D line and space measurements as well as 1D contact measurements are used for calibration. However, those measurements include patterns exposed at dose levels between 75% and 150% of the nominal dose. The best model achieved in this study uses 2 e-beam kernels and 4 kernels for the simulation of development and etch effects. The model error RMS on a large range of CD down to 34 nm line CD is 0.71 nm. The calibrated model is then used to generate 2D contours for line ends, space ends and contacts and those contours are compared to SEM images. For all patterns, including those very close to the resolution limit, very good contour overlay is achieved. It appears that by including the various dose levels in the calibration a very good separation of the e-beam model components from the etch components is possible and that this also results in very accurate 2D model quality. In conclusion, very accurate mask model calibration is achieved for mask processes using shot dose assignment. Standard test patterns can be used for calibration if they include the dose variations intended for correction.

Evaluation of methods to improve EUV OPC model accuracy

Several methods are evaluated to improve the accuracy of extreme ultraviolet (EUV) lithography OPC models by including additional physical effects which are not commonly used in deep ultraviolet (DUV) OPC. The primary additions to the model in this work are model based corrections for flare and two different corrections for mask shadowing effects, commonly referred to as HV bias. The quantitative, incremental, improvement from each of these additions is reported, and the resulting changes in tape-out flow and OPC runtime are discussed