Gennady I. Zebrev

Modeling of Radiation-Induced Leakage and Low Dose-Rate Effects in Thick Edge Isolation of Modern MOSFETs

A procedure of SPICE parameters extraction for radiation-induced equivalent lumped parasitic transistor is proposed. Comparison of radiation-induced leakage current in test MOSFETs between total dose irradiation experiments and simulation results exhibits excellent agreement. Mathematical description of combined enhanced low dose-rate sensitivity and tunnel annealing effects as applied to the MOSFET subthreshold leakage has been developed. It has been numerically found that the ELDRS effects are significantly suppressed by the simultaneous tunnel annealing in the edge isolation of MOSFETs.

Design of 65 nm CMOS SRAM for Space Applications: a Comparative Study

We study the design of different SRAM blocks based on a commercial 65 nm CMOS technology and discuss the experimental results for X-ray, proton and heavy ion irradiation campaigns. The results obtained show that the number of affected bits depends not only on LET value, but also on the localization of a strike. DICE cells demonstrate about 2-3 orders of magnitude lower than cross-sections for 6T-cells due to the 2-μm nodal spacing of sensitive pairs. Solid and intermittent guard rings has high effectiveness in SEL elimination.

Small-Signal Capacitance and Current Parameter Modeling in Large-Scale High-Frequency Graphene Field-Effect Transistors

An analytical model of the small-signal current and capacitance characteristics of radio frequency graphene field-effect transistors (GFETs) is presented. The model is based on explicit distributions of chemical potential in graphene channels (including ambipolar conductivity at high source-drain bias) obtained in the framework of drift-diffusion current continuity equation solution. Small-signal transconductance and output conductance characteristics are modeled by considering the two modes of drain current saturation, including drift velocity saturation or electrostatic pinchoff. Analytical closed expression for the complex current gain and the cutoff frequency of high-frequency GFETs are obtained. This model allows to describe an impact of parasitic resistances, capacitances, interface traps on extrinsic current gain, and cutoff frequency.

Graphene Field Effect Transistors: Diffusion-Drift Theory

Based on explicit solution of current continuity equation in the graphene FETs channel the semi-classical diffusion-drift description of the carrier transport and I-V characteristics model has been developed. Role of rechargeable defects (interface traps) near or at the interface between graphene and insulated layers has also described.

Microdose Induced Drain Leakage Effects in Power Trench MOSFETs: Experiment and Modeling

We study experimentally and theoretically the micro-dose induced drain-source leakage current in the trench power MOSFETs under irradiation with high-LET heavy ions. We found experimentally that cumulative increase of leakage current occurs by means of stochastic spikes corresponding to a strike of single heavy ion into the MOSFET gate oxide. We simulate this effect with the proposed analytic model allowing to describe (including Monte Carlo methods) both the deterministic (cumulative dose) and stochastic (single event) aspects of the problem. Based on this model the survival probability assessment in space heavy ion environment with high LETs was proposed.

Simulation of Bipolar Transistor Degradation at Various Dose Rates and Electrical Modes for High Dose Conditions

Radiation response of bipolar devices irradiated under various electrical modes and dose rates at high doses has been studied. A nonlinear numerical model including ELDRS effects and electric field reduction at high doses has been developed and validated. Dose degradation of a bipolar transistors gain factor at different dose rates and electrical modes has been simulated and explained in a unified way, based on dependence of the charge yield in isolation oxides on dose rates and electric fields. It has been shown that at high doses one needs to use a nonlinear, self-consistent numerical approach, accounting for simultaneous suppression of the oxide electric field induced by trapped charge. Correspondingly, two types of degradation saturation have been revealed: (i) due to simultaneous thermal annealing, and (ii) due to total dose dependent electric field reduction in oxides. The former implies proportionality of the saturation dose and degradation level to dose rate, the latter permits dose rate independent saturation levels of degradation.

Using capacitance methods for interface trap level density extraction in graphene field-effect devices

Methods of extraction of interface trap level density in graphene field-effect devices from the capacitance-voltage measurements are described and discussed. Interrelation with the graphene Fermi velocity extraction is shown. Similarities and differences in interface trap extraction procedure in graphene and silicon field-effect structures are briefly discussed.

Compact Modeling and Simulation of Heavy Ion-Induced Soft Error Rate in Space Environment: Principles and Validation

A simple physical model for calculation of the ion-induced soft error rate in space environment has been proposed, based on the phenomenological cross-sectional notion. The proposed numerical procedure is adapted to the multiple cell upset characterization in highly scaled memories. Nonlocality of the ion impact has been revealed as the key concept determining the difference between physical processes in low-scaled and highly scaled memories. The model has been validated by comparison between the simulation results and the literature on-board data. It was shown that the proposed method provides single-valued prediction results correlating well with on-board data-based solely on cross-sectional data and LET spectra without any hidden fitting parameters and procedures.

Fault-Tolerant SOI Microprocessor for Space Applications

The design and experimental results are presented for the fault-tolerant 0.35 ìm SOI CMOS microprocessor. DICE-like cells are shown to be vulnerable to SEU during “read” and “write” modes.

Temporal and Dose Kinetics of Tunnel Relaxation of Non-Equilibrium Near-Interfacial Charged Defects in Insulators

This paper is devoted mainly to mathematical aspects of modeling and simulation of tunnel relaxation of non-equilibrium charged oxide traps located at/near the interface insulator - conductive channel, for instance in irradiated MOS devices. The generic form of the tunnel annealing response function was derived from the rate equation for the charged defect buildup and annealing as a linear superposition of the responses of different defects with different time constants. Using this linear response function, a number of important practical problems are analyzed and discussed. Combined tunnel and thermal annealing, the power law temporal relaxation after a single ion strike into the gate oxide, are described in context of a general approach.