George Metze

An Antenna Co-Design Dual Band RF Energy Harvester

RF energy is widely available in urban areas and thus presents a promising ambient energy harvesting source. In this paper, a CMOS harvester circuit is modeled and analyzed in detail at low environmental power levels. Based on the circuit analysis, a design procedure is given for a narrowband energy harvester. The antenna and harvester co-design methodology is discussed to improve RF to DC energy conversion efficiency. We demonstrate that it is difficult to harvest RF energy over a wide frequency band if the ambient RF energy sources are weak, owing to the voltage requirements. Since most ambient RF energy lies in a few narrow bands, a dual/multi-band energy harvester architecture should be able to harvest much of the available RF energy. A dual-band CMOS energy harvester is designed and fabricated using an IBM 0.13 μm process. The simulated and measured results demonstrate a dual-band energy harvester that obtains over 9% efficiency for two different bands (around 900 MHz and around 1900 MHz) at an input power as low as -19.3 dBm. The DC output voltage of this harvester is over 1 V, which can be used to recharge the battery to form an inexhaustibly powered communication system.

Self-consistent modeling of heating and MOSFET performance in 3-D integrated circuits

We present a new method for finding the temperature profile of vertically stacked three-dimensional (3-D) digital integrated circuits (ICs). Using our model, we achieve spatial thermal resolution at the desired circuit level, which can be as small as a single MOSFET. To resolve heating of 3-D ICs, we solve nonisothermal device equations self-consistently with lumped heat flow equations for the entire 3-D IC. Our methodology accounts for operational variations due to technology nodes (hardware: device), chip floor plans (hardware: layout), operating speed (hardware: clock frequency), and running applications (software). To model hardware, we first decide on an appropriate device configuration. We then calculate elements of the lumped thermal network using the 3-D IC layout. To include software, chip floor plan, and duty cycle-related performance variations, we employ a statistical Monte Carlo type algorithm. In this paper, we investigate performance of vertically stacked 3-D ICs, with each layer modeled after a Pentium III. Our calculated results show that layers within the stacked 3-D ICs, especially the ones in the middle, may greatly suffer from thermal heating.

A planar dual-band antenna design for RF energy harvesting applications

Past work on radio frequency (RF) energy harvester design mostly focused on harvesting RF energy in a single RF band [1, 2,]. While a significant portion of RF energy is concentrated in the communication band around 900 MHz, there is also abundant RF energy present in the band covering 1800 MHz to 2100 MHz. For example. Li [2011] demonstrated the design and implementation of a dual band RF energy harvester chip that has two cascade voltage multipliers in parallel and can operate at 900 and 1900 MHz bands. The chip can generate 1.2 V output DC voltage at 900 MHz for −19 dBm RF input power and 1.05 V output voltage at 2000 MHz for −18 dBm RF input power. The RF energy conversion efficiency is ∼12% at 900MHz and ∼8% at 2000MHz which is comparable with its single band counterparts at both frequencies in the literature. The design greatly increases the energy harvesting efficiency over two bands. It is found that the input impedance of the chip is ∼ 50 ohm at 900 MHz, 26 ohm at 1.9 GHz, and 70+j10 ohm at 2 GHz. To operate the harvester chip in two bands, the antenna is required to be matched to the chip impedance at 900 MHz for one band and at either 1.9 GHz or 2GHz for the other band.

The effects of electrochemically-induced etching non-uniformities on microwave field effect transistors

For the first time, direct experimental evidence of the electrochemical etching component, associated with wet chemical etching of semiconductor devices, is shown to produce significant non-uniformities in device (e.g. material) characteristics. Furthermore, it is shown that these electrochemically-induced non-uniformities (within the device itself) can significantly reduce RF performance of power microwave devices. Comparative microwave measurements between discrete power devices that had, or did not have, electrochemically-induced non-uniformities, clearly demonstrated marked differences in device power-added efficiency (PAE).<<ETX>>

Coupled Simulation of Device Performance and Heating of Vertically Stacked Three-Dimensional Integrated Circuits

We have developed a method for calculating the temperature distribution of a three-dimensional (3D) integrated circuit (IC) and the performance of a single device self-consistently. At the device level, we resolve effects of channel temperatures and thermal boundary conditions on device performance. Thus we obtain non-isothermal device characteristics for a representative device of the technology node used to fabricate the 3D-IC. At the 3D-IC level, we first approximate the average heat generation of each device on the chip using a statistical Monte Carlo method. We second determine effects of the chip layout and the fabrication materials on thermal coupling. Next we calculate thermal profile of the 3D-IC in conjunction with the individual device operations, 3D-IC layout and full-chip workload statistics. Our technique offers a numerical method to isolate affects of chip layout, floor-plan and operational activity on 3D-IC thermal profile. Thus it enables designers to pinpoint potential hotspots, and test new design paradigms for cooling methods.

Improved RF power harvesting circuit design

A topic of intense study in RF wireless research is that of wireless sensor networks. These devices are capable of sensing data, performing data processing, and wireless transmission to other sensor nodes. When distributed in a random fashion in an area, these sensor nodes organize themselves into a network capable of routing data back to a central access point. Wireless ad-hoc sensor networks represent a major tool with applications to disaster relief, the military, health care, and business. One of the fundamental challenges towards realizing this goal is that of powering such a system for long periods of time. Given that miniature battery capacity is limited, the ability to harvest energy from the environment could greatly extend the operational life of sensor nodes. Towards this goal, RF energy harvesting shows tremendous promise.To accomplish this goal, power matched Villard voltage doubler circuits are employed utilizing diode connected MOSFETs. Three circuit modifications are presented for improving the efficiency of the Villard Voltage doubler as an RF power harvesting circuit.

Coupled modeling of time-dependent full-chip heating and quantum non-isothermal device operation

A method for predicting full chip temperature heating resulting from device operation is presented. The method couples distributed device simulation with lumped thermal analysis. Predictions show sixty degree Kelvin temperature increases for 0.5 cm ICs. A method for reducing chip temperature is also presented.

Increased CMOS inverter switching speed with asymmetrical doping

Abstract The DC and transient operations of asymmetrically doped CMOS inverters are investigated. The asymmetrical doping consists of a halo around either the source or the drain. We investigate the DC and transient characteristics of devices and CMOS inverters that contain these halos. To facilitate the investigation, a new algorithm for mixed mode device/circuit simulation is developed. We find that the utilization of the source halo provides significant improvement in the DC and switching characteristics of both devices and CMOS inverters. The drain halo improves performance but gives rise to increased source–drain leakage currents. The effects of narrowing the halo doping is also investigated.

An integrated low power transceiver system

Wireless sensor networks(WSN) demand low power and low cost transceiver design. In this paper, an integrated transceiver system has been designed and fabricated using a 0.13µm CMOS process for ultra low power WSN applications. The system integrates an OOK receiver, a transmitter, RF/DC switches and a voltage regulator which provides comprehensive on-chip biasing circuitry in a 2×2mm2 chip. A common source low noise amplifier (LNA) works at sub-threshold range to achieve maximum power efficiency. A Villard voltage doubler circuit and a voltage transformer have been used to significantly improve the OOK signal demodulation efficiency and the system sensitivity with near zero power consumption. The system obtains a receiver sensitivity of −60 dBm with 4mW@1.4V.

916 MHz F-Inverted Compact Antenna (FICA) for Highly Integrated Transceivers

Ultra small smart sensor network transceivers, such as Smart Dust, have a total volume of a few cubic millimeters to one cubic centimeters, including transceiver integrated circuit (IC), battery, sensor, antenna and ground plane. The millimeter or centimeter scale dimensions (including the size of the ground plane) are often a small fraction of a quarter wavelength at the operating frequency. This letter shows a novel low profile 916 MHz F-inverted Compact Antenna (FICA) with a volume of 0.024 lambdatimes 0.06 lambdatimes 0.076 lambdatimes , ground plane included. The radiation efficiency is 48.53% and the peak gain is -1.38 dBi. The designed antenna can be easily scaled to higher operating frequencies, such as the 2000 to 2500 MHz bands with comparable performance whereas the volume is significantly reduced.