Geraint Chaffey
Imperial College London
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Publication
Featured researches published by Geraint Chaffey.
european conference on power electronics and applications | 2014
Philip Clemow; Paul D. Judge; Geraint Chaffey; Michael M. C. Merlin; Thomas Luth; Tim C. Green
It is important to be able to produce representative experimental results when researching HVDC grids and converters. This paper reports on a lab-scale multi-level converter build. The converter was built with a large number of cells to enable experiments with cell balancing effects and with temperature control to investigate thermal effects and appropriate responses. The converter is able to behave as both a traditional MMC (or CTLC which is functionally similar) and as the newer AAC converter. Results are presented that show the converter is able to charge up from the DC bus and is able to function well with both static and changing power references.
ieee powertech conference | 2015
Geraint Chaffey; Tim C. Green
Recently proposed meshed HVDC networks include both converters and DC circuit breakers, and the fault currents experienced and therefore the capacity requirement of circuit breakers are dependent on the topology of converters used on the network. This paper analyses the difference in fault currents seen in various network configurations utilising fault-feeding and fault-blocking converters. Results are presented showing the reduced fault currents seen in the regions of the DC network where fault current limiting converters have been implemented, which could have an impact on the topology, current rating and therefore size and cost of the circuit breaker.
european conference on cognitive ergonomics | 2015
Geraint Chaffey; Tim C. Green
Circuit breakers are expected to be a vital element within any high capacity HVDC network. This paper examines the directional current breaking capacity requirements that might be seen on a typical HVDC grid, as required for the specification of backup protection. It is shown that there is a significant difference between the peak prospective fault currents observed when the current direction is analysed. Several meshed network topologies are examined in order to evaluate and quantify the characteristics of the directional breaker requirement. Results are presented determining that both the current breaking magnitude duty and the time constraint typically associated with the DC fault are both significantly different when comparing the current direction through the breaker, which may influence future breaker design.
IEEE Transactions on Power Electronics | 2018
Paul D. Judge; Geraint Chaffey; Michael M. C. Merlin; Philip Clemow; Tim C. Green
A hybrid modular multilevel converter, comprising a mixture of full-bridge and half-bridge submodules, provides tolerance to dc faults without compromising the efficiency of the converter to a large extent. The inclusion of full bridges creates a new freedom over the choice of ratio of ac-to-dc voltage at which the converter is operated, with resulting impact on the converters internal voltage, current, and energy deviation waveforms, all of which impact the design of the converter. A design method accounting for this and allowing the required level of derating of nominal submodule voltage and uprating of stack voltage capability to ensure correct operation at the extremes of the operating envelope is presented. A mechanism is identified for balancing the peak voltage that the full-bridge and half-bridge submodules experience over a cycle. Comparisons are made between converters designed to block dc-side faults and converters that also add STATCOM capability. Results indicate that operating at a modulation index of 1.2 gives a good compromise between reduced power losses and additional required submodules and semiconductor devices in the converter. The design method is verified against simulation results, and the operation of the converter at the proposed modulation index is demonstrated at the laboratory scale.
workshop on control and modeling for power electronics | 2017
Michael M. C. Merlin; Paul D. Judge; Geraint Chaffey; James Wylie; Tim C. Green
The presence of Director Switches (DS) in its arms enables the Alternate Arm Converter (AAC) to generate smooth current waveforms while using a reduced number of Sub-Modules (SMs) when compared to the Modular Multilevel Converter. To maximise the power efficiency of the AAC and simplify the DS design, it is highly beneficial to soft-switch the DS. This paper presents a method which reliably ensures their soft-switching operation using the blocked state of SMs during the non-conducting part of the cycle of an arm. Experimental results demonstrate the effectiveness of the proposed method over a wide range of operating conditions.
workshop on control and modeling for power electronics | 2017
Xin Xiang; Xiaotian Zhang; Geraint Chaffey; Yunjie Gu; Tim C. Green
The dc-dc conversion will play an important role in multi-terminal dc networks and dc grids. This paper presents two isolated resonant modular multilevel converters (IRMMCs) to fulfill the large step-ratio conversion for medium voltage dc (MVDC) networks. The conventional resonant modular multilevel converters (RMMCs) suffer the common problems of non-isolation and high current stress, which are solved in the proposed IRMMCs. They not only inherit the beneficial features of inherent sub-module (SM) voltage-balancing and soft-switching operation from RMMCs, but also develop multi-module configurations to neutralize the current ripples on both sides of the dc-links. The theoretical analysis is verified by a set of full-scaled simulations for different application examples in MVDC collection and distribution. The results demonstrate the proposed IRMMCs and its derived configurations have good potential for operation as large step-ratio MVDC transformers.
european conference on cognitive ergonomics | 2016
Geraint Chaffey; Paul D. Judge; Michael M. C. Merlin; Philip Clemow; Tim C. Green
Modular Multilevel Converters (MMC) can provide significant advantages for power transmission applications, however there are remaining challenges trading off DC fault response, losses and controllability. Alternative multilevel converter topologies using combinations of full bridge and half bridge submodules or series switches allow for competitive efficiency whilst retaining control over the DC fault current. Several possible fault responses are analysed to evaluate appropriate converter control actions. Experimental results from a 60 submodule 15 kW demonstrator are presented to validate the DC fault performance of the full bridge MMC, the mixed stack MMC and the alternate arm converter. It is shown that each can control the current into a low impedance DC fault, and there no requirement to block the semiconductor devices.
International High Voltage Direct Current 2015 Conference (HVDC2015) | 2015
Paul D. Judge; Geraint Chaffey; Philip Clemow; Mmc Merlin; Tim C. Green
IEEE Transactions on Power Electronics | 2018
Michael M. C. Merlin; Diego Soto-Sanchez; Paul D. Judge; Geraint Chaffey; Philip Clemow; Tim C. Green; David Reginald Trainer; Kevin J. Dyke
IEEE Transactions on Power Delivery | 2018
Mian Wang; Willem Leterme; Geraint Chaffey; Jef Beerten; Dirk Van Hertem