Gerwin Hermanus Gelinck
Samsung
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Featured researches published by Gerwin Hermanus Gelinck.
IEEE Journal of Solid-state Circuits | 2012
Kris Myny; E. van Veenendaal; Gerwin Hermanus Gelinck; Jan Genoe; Wim Dehaene; P. Heremans
Forty years after the first silicon microprocessors, we demonstrate an 8-bit microprocessor made from plastic electronic technology directly on flexible plastic foil. The operation speed is today limited to 40 instructions per second. The power consumption is as low as 100 μW. The ALU-foil operates at a supply voltage of 10 V and back-gate voltage of 50 V. The microprocessor can execute user-defined programs: we demonstrate the execution of the multiplication of two 4-bit numbers and the calculation of the moving average of a string of incoming 6-bit numbers. To execute such dedicated tasks on the microprocessor, we create small plastic circuits that generate the sequences of appropriate instructions. The near transparency, mechanical flexibility, and low power consumption of the processor are attractive features for integration on everyday objects, where it could be programmed as, amongst other items, a calculator, timer, or game controller.
IEEE Journal of Solid-state Circuits | 2011
Kris Myny; Monique J. Beenhakkers; N.A.J.M. van Aerle; Gerwin Hermanus Gelinck; Jan Genoe; Wim Dehaene; P. Heremans
Dual-gate organic transistor technology is used to increase the robustness of digital circuits as illustrated by higher inverter gains and noise margins. The additional gate in the technology functions as a VT-control gate. Both zero-VGS-load and diode-load logic are investigated. The noise margin of zero- VGS-load inverter increases from 1.15 V (single gate) to 2.8 V (dual gate) at 20 V supply voltage. Diode-load logic inverters show an improvement in noise margin from ~0 V to 0.7 V for single gate and dual gate inverters, respectively. These values can be increased significantly by optimizing the inverter topologies. As a result of this optimization, noise margins larger than 6 V for zero- VGS-load logic and 1.4 V for diode-load logic are obtained. Functional 99-stage ring oscillators with 2.27 μs stage delays and 64 bit organic RFID transponder chips, operating at a data rate of 4.3 kb/s, have been manufactured.
international solid-state circuits conference | 2009
Kris Myny; Monique J. Beenhakkers; N.A.J.M. van Aerle; Gerwin Hermanus Gelinck; Jan Genoe; Wim Dehaene; P. Heremans
Research towards 13.56MHz organic RFID tags is one of the drivers for the field of organic electronics. A capacitively-coupled 64b organic RFID tag operating at 125kHz was demonstrated in [1]. Inductively-coupled 64b organic RFID tag operating at 13.56MHz were reported in [2,3].
international solid-state circuits conference | 2008
Kris Myny; S. Van Winckel; S. Steudel; Peter Vicca; S. De Jonge; Monique J. Beenhakkers; Christoph Wilhelm Sele; N.A.J.M. van Aerle; Gerwin Hermanus Gelinck; Jan Genoe; P. Heremans
RFID systems operating at a base carrier frequency of 13.56 MHz can use low-cost inductive antennas on foil. In parallel to this coil, a capacitor on foil is used for matching the resonance frequency at 13.56 MHz. This LC-antenna detects the signal transmitted by the reader and energizes the organic rectifier with an AC-voltage at 13.56 MHz. From this voltage the rectifier generates the DC supply voltage for the 64 b organic transponder chip, which drives the modulation transistor between the on and off state with a 64b code sequence.
Applied Physics Letters | 2011
A. J. J. M. van Breemen; J.B.P.H. van der Putten; Ronggang Cai; K. Reimann; Albert W. Marsman; Nicolaas Petrus Willard; Dago M. de Leeuw; Gerwin Hermanus Gelinck
An I-line photolithography process for ferroelectric polymers is developed. It is based on photocrosslinking using a bisazide photoinitiator. Patterned layers were realized down to 1-2 µm resolution. Crosslinking yields a close-to-insoluble ferroelectric polymer network that counter intuitively has similar ferroelectric properties as a noncrosslinked film. The negative process is used to stack ferroelectric films on top of each other to make three-dimensional cross-bar arrays of nonvolatile ferroelectric capacitor memories.
international solid-state circuits conference | 2003
Eugenio Cantatore; Cornelis Maria Hart; M. Digioia; Gerwin Hermanus Gelinck; Tom C. T. Geuns; Hjalmar Edzer Ayco Huitema; L. Schrijnemakers; E. van Veenendaal; Dago M. de Leeuw
Research on organic electronics is focussed on materials and on the performance of discrete devices. Reliability and circuit yield is largely unexplored. Yield, based on measurements on digital organic circuits up to 1000 transistors, is described. The causes of yield loss are analyzed and design solutions to improve the yield are discussed.
european solid-state circuits conference | 2011
P. Heremans; Wim Dehaene; M. Steyaert; Kris Myny; Hagen Marien; Jan Genoe; Gerwin Hermanus Gelinck; E. van Veenendaal
In this paper, we review the state of the art of digital and analog circuits that have been shown in recent years in organic thin-film transistor technology on flexible plastic foil. The transistors are developed for backplanes of displays, and therefore have the characteristics to be unipolar and to possess two gates. The dual-gate architecture is employed to increase the transistors intrinsic transconductance, and to create dual-VT logic. We highlight recent examples of digital and analog plastic thin-film circuits. Furthermore, we give an outlook into new technological evolutions, including thin-film semiconductors with high mobility, the advent of complementary thin-film circuits, and of thin-film electrically re-programmable nonvolatile memory.
International Journal of High Speed Electronics and Systems | 2011
François Furthner; Mária Péter; B. van der Putten; Gerwin Hermanus Gelinck; Erwin R. Meinders; T.C.T. Geuns; W. de Laat
The development of high performance thin-film transistors on flexible plastic substrates is of great importance for the manufacturing and industrialization of flexible electronic devices, such as flexible displays. Here we present different approaches to fabricate bottom-gate field-effect transistors on 25 μm heat stabilized polyethylene naphthalate (PEN) foil using photolithography and solution processing. The flexibility and dimensional instability of the substrate constituted the main challenge during manufacturing. We developed a novel method to handle the foils during processing by reversibly attaching them onto 6 inch Si wafers. The so-called foil-on-carrier assembly showed excellent flatness (about 1 μm) and good dimensional stability and tolerance towards the different processing steps up to 160°C. Transistors were made either using an organic polymer or an inorganic oxide as gate dielectric material. Source and drain gold electrodes were patterned using standard photoresist patterning followed by wet etching, or by lift-off. The feature sizes in the transistors were downsized from 5 μm to sub-micrometer to improve the performance. In order to achieve structures with high resolution, all functional layers were patterned using a commercial wafer stepper (PAS5500/100D). The two dielectric materials used and the two ways of making the source-drain resulted in four different metal-insulator-metal (MIM) stacks. The MIM stacks were characterized by optical microscopy, scanning electron microscopy and four point resistance measurements. Registration accuracies below 0.5 μm were found over the whole wafer. Transistor fabrication was finished by depositing pentacene derivatives from solution.
Organic Electronics | 2010
Kris Myny; S. Steudel; Steve Smout; Peter Vicca; François Furthner; B. van der Putten; Ashutosh Tripathi; Gerwin Hermanus Gelinck; Jan Genoe; Wim Dehaene; P. Heremans
Organic Electronics | 2009
Maarten Debucquoy; Maarten Rockele; Jan Genoe; Gerwin Hermanus Gelinck; Paul Heremans