Gheorghe Stefan

The splicing mechanism and the Connex memory

Presents the main ideas concerning the implementation of a molecular mechanism in solid-state circuits: the splicing operation. The physical support for this operation is the Connex memory circuit (Stefan, 1986, 1995). Observing the similarities between a DNA computing-based mechanism and this new type of memory, we make a proposal to implement fine-grain computational parallelism on silicon. We promote this solution because a pure biological process is very hard to interface with machines in todays technologies. We make also evaluations of the complexity of our proposed machine.

Integral Parallel Architecture & Berkeley's Motifs

The Integral Parallel Architecture (IPA) developed and actually implemented by BrightScale is a low-power(133 GOPS/Watt) & low-area (8 GOPS/mm^2) one-chip solution to solve intense computational problems using data-parallel, time-parallel and speculative-parallel mechanisms. BrightScale technology is presented from the point of view of each of the 13 motifs proposed in The Berkeleys View. IPA emerges from Kleenes computational model of the partial recursive functions as the simplest parallel architecture, a good starting point for a true science of parallel computation. We briefly investigate how such an elementary parallel architecture performs, for the main computational motifs, in solving the problems of programmability, portability, flexibility, data movement between computational cells, and between cells and the main memory.

DIALISP - a LISP machine

High performance facilities to interpret LISP represent an ever increasing request even for minis. This paper presents a LISP hardware structure conceived to be implemented in a general purpose mini system called DIAGRAM. The LISP structure had to be adapted to the system technological requirements and size. The data structure and the instruction set concerning the basic machine are also presented.

Complex vs. Intensive in Parallel Computation

The distinction between complex computation and intensive computation becomes more meaningful now, when all high performance computing machines are de facto parallel machines. The distinction is stated by introducing the concept of integral parallel computation as the most natural and efficient way to increase the performance using all kinds of parallel computations. A new functional taxonomy of parallel machines is used to support the integral approach. Finally, the new concepts and distinctions are exemplified describing the Connex Architecture and its first embodiment: the video-chip CA1024 launched by Connex Technology, Inc.

Local Alignments of DNA Sequences with the Connex Array

This paper presents a heuristic for finding close to optimal solutions to the local alignment problem of two DNA sequences, and more precisely to the gene prediction problem on the Connex Array circuit, a new hierarchical parallel in-memory device. Though not optimal, the solutions generated by our algorithm compare well with those generated by other algorithms in the public domain. When aligning a probe of N symbols to a target of M symbols, the algorithm has a theoretical time complexity of O(N log(N)), with a small constant of proportionality, and requires no preprocessing of the data. However, experimental results exhibit quasi-linear time complexity

Virtual environment for robots interfaces design and testing

This paper refers to the implementation of a virtual environment for the robot interfaces testing. This software environment is very useful because, comparing to the experiments with real robots, it allow the testing and evaluation of different types of interfaces and different working environments with diverse configurations. A very important facility of this interactive software environment is the fact that the designers of the robots sensors and interfaces are able to work in parallel to design test, optimize and realize different control devices for the robot

Memory management unit-a new principle for LRU implementation

A new principle is presented for a memory management unit (MMU) which contains a new circuit for LRU (least recently used) implementation. A MMU has been chosen for study. It works with a 24-b address processor for which it facilitates access to a virtual memory (VM) of 16 Mwords, available on a disk, through the assistance of a paginated dynamic primary memory (PM) of 1 Mword, which keeps the most recently used (MRU) pages.<<ETX>>

Backus language for functional nano-devices

The emergent nano-technologies must be used to design functional nano-devices with complexity in the range of their size. The way to achieve this goal is to define parallel programmable engines. The concept of FP System, introduced by John Backus in 1978, is used to define a high level architectural environment: Backus-Connex Parallel Functional Programming System. The functional forms of FP Systems correspond perfect with the four types of parallelism derived for ConnexArray™ from the Kleenes computational model. The paper defines the BC programming environment, describes its implementation in Scheme and presents its use for developing real applications for functional nano-devices.

Artificial muscle for locomotory prosthesis

One of the hopes, of the scientific frontier domains tangent with the artificial intelligence is and will probably remain for a long time, the realization of the artificial prosthesis and organs which could compensate for the people the incurable consequences of some accidents or severe diseases. From all the types of prosthesis existent on the market in the present, only 1% have implemented electronic devices for the controlling and command of the movements and these only for the big dimensions segments (elements of the elbow articulation, knee etc). The system which is presented in this paper allow a personalized design of the prothesis according to the characteristics and the specific needs of the patient. This system allowed the authors to design, test and implement two intelligent prothesis for legs which are also presented in this paper. The intelligent structure of these prothesis include pressure sensors, position sensors and microcontrollers. The mechanical structure of these prothesis was realized from articulated segments of composite and metallic materials and for the artificial muscular system was used pneumatic muscles.

Functional Virtual Prototyping Environment for a Family of Map-Reduce Embedded Accelerators

This emergence of the heterogeneous computing is based mainly on various forms of parallel accelerators. We present a family of accelerators for embedded computation with a map-reduce architecture based on the partial recursive functions computation model introduced by Stephen Kleene. A three-level virtual prototyping environment is provided to support the development of embedded applications. The first level is written in a Lisp-like functional language. The second is a C-like environment which segregates the intense part of the computation from the complex part. The last one is a low level simulator able to provide support for advanced optimizations. The environment is designed for developing applications by tuning the architecture of a family of many-core machines which provide high performance per Watt and cm2. The energy efficiency of processors backing our architectural approach is in the range of 10 pJ/flop evaluated for the standard cell 28nm technology.