Giannis Giannoulis

Interfacing Dielectric-Loaded Plasmonic and Silicon Photonic Waveguides: Theoretical Analysis and Experimental Demonstration

A comprehensive theoretical analysis of end-fire coupling between dielectric-loaded surface plasmon polariton and rib/wire silicon-on-insulator (SOI) waveguides is presented. Simulations are based on the 3-D vector finite element method. The geometrical parameters of the interface are varied in order to identify the ones leading to optimum performance, i.e., maximum coupling efficiency. Fabrication tolerances about the optimum parameter values are also assessed. In addition, the effect of a longitudinal metallic stripe gap on coupling efficiency is quantified, since such gaps have been observed in fabricated structures. Finally, theoretical results are compared against insertion loss measurements, carried out for two distinct sets of samples comprising rib and wire SOI waveguides, respectively.

Data Transmission and Thermo-Optic Tuning Performance of Dielectric-Loaded Plasmonic Structures Hetero-Integrated on a Silicon Chip

We demonstrate experimental evidence of the data capture and the low-energy thermo-optic tuning credentials of dielectric-loaded plasmonic structures integrated on a silicon chip. We show 7-nm thermo-optical tuning of a plasmonic racetrack-resonator with less than 3.3 mW required electrical power and verify error-free 10-Gb/s transmission through a 60-μm-long dielectric-loaded plasmonic waveguide.

Active Plasmonics in True Data Traffic Applications: Thermo-Optic On/Off Gating Using a Silicon-Plasmonic Asymmetric Mach–Zehnder Interferometer

We present the first system-level demonstration of an active plasmonic device in 10-Gb/s data traffic conditions. An asymmetric silicon-plasmonic Mach-Zehnder interferometer with dielectric-loaded plasmonic waveguides serving as the electrically controlled arms, operates as thermo-optic On/Off gating element with 2.8- μ s response time and 10.8-mW power consumption.

First demonstration of active plasmonic device in true data traffic conditions: ON/OFF thermo-optic modulation using a hybrid silicon-plasmonic asymmetric MZI

We demonstrate the first system-level evaluation of an active plasmonic device in 10Gb/s data traffic conditions. Thermo-optic ON/OFF modulation with 3μs response time and 10mW power consumption is presented using an asymmetric MZI silicon-plasmonic gate.

Demonstration of a Plasmonic MMI Switch in 10-Gb/s True Data Traffic Conditions

We report the first experimental performance evaluation of a 75-μm-long plasmonic multimode interference switch that is hetero-integrated on a silicon-on-insulator platform, operating with 10-Gb/s data signals. The switch exhibits a 2.9-μs response time and 44.5% modulation depth, while the extinction ratio between the ports alters from 5.4 to -1.5 dB for 35-mW electrical (switching) power. Error-free performance was achieved.

Ultracompact and Low-Power Plasmonic MZI Switch Using Cyclomer Loading

We present a 2 × 2 hybrid silicon-plasmonic thermooptic (TO) asymmetric Mach-Zehnder interferometric (MZI) switch having only 40-μm long active cyclomer-loaded plasmonic phase arms. It requires less than 12 mW of power and has 2/5-μs ON/OFF-times, respectively, a modulation depth higher than 90% and a 13.2-dB extinction ratio. Data traffic evaluation has been carried out using 10-Gb/s nonreturn-to-zero streams, yielding error-free operation at both switching states with power penalties ranging between 1 to 4.8 dB. The use of the cyclomer loading having a higher TO coefficient than polymethyl methacrylate has resulted to the smallest footprint among plasmonic MZI TO switches reported so far.

Bringing High-Performance GaInNAsSb/GaAs SOAs to True Data Applications

We experimentally demonstrate the high-speed data processing capabilities of a GaInNAsSb semiconductor optical amplifier operating at 1.55 μm. The investigated structure exhibits good thermal characteristics and fast gain dynamics with 10%-90% recovery time of 55 ps. Successful wavelength conversion of 10-Gb/s signals is reported. A maximum power penalty of <;2.4 dB for return to zero formatting and of 1.9 dB for nonreturn to zero is demonstrated.

On-Chip Dual-Stream DWDM Eight-Channel-Capable SOI-Based MUX s /DEMUX s With 40-GH z Channel Bandwidth

We demonstrate two 8 × 1 silicon ring resonator (RR)-based multiplexers (MUXs) integrated on the same chip for dual-stream 16-channel multiplexing/ demultiplexing applications. Cascaded second-order RRs equipped with microheaters were integrated on a silicon-on-insulator platform with the radii of MUX1 and MUX2 being ~12 and ~9 μm, respectively. The resonances of the two MUXs were thermooptically tuned in order to achieve 100-GHz channel spacing, revealing a tuning efficiency of 43 and 36 μW/GHz/RR for MUX1 and MUX2, respectively, and 352 mW total power consumption. Lower than 18 dB crosstalk and higher than 40-GHz 3-dB bandwidth was obtained for the tuned channels of the MUXs. The signal integrity when using these devices in multiplexing and demultiplexing operations was evaluated for a 4 × 10 Gb/s non-return-to-zero data stream (i.e., 10 Gb/s line rate) via bit-error-rate measurements, yielding error-free performance with up to 0.2 dB power penalty for all channels. Proofof-concept demonstration for supporting higher data rates was also realized by using three 100-GHz-spaced 25-Gb/s return-to-zero data signals (i.e., 25 Gb/s line rate) for multiplexing and demultiplexing via MUX2, resulting in error-free operation for all channels with lower than 0.3 dB power penalties.

Photonic integration enabling new multiplexing concepts in optical board-to-board and rack-to-rack interconnects

New broadband applications are causing the datacenters to proliferate, raising the bar for higher interconnection speeds. So far, optical board-to-board and rack-to-rack interconnects relied primarily on low-cost commodity optical components assembled in a single package. Although this concept proved successful in the first generations of opticalinterconnect modules, scalability is a daunting issue as signaling rates extend beyond 25 Gb/s. In this paper we present our work towards the development of two technology platforms for migration beyond Infiniband enhanced data rate (EDR), introducing new concepts in board-to-board and rack-to-rack interconnects. The first platform is developed in the framework of MIRAGE European project and relies on proven VCSEL technology, exploiting the inherent cost, yield, reliability and power consumption advantages of VCSELs. Wavelength multiplexing, PAM-4 modulation and multi-core fiber (MCF) multiplexing are introduced by combining VCSELs with integrated Si and glass photonics as well as BiCMOS electronics. An in-plane MCF-to-SOI interface is demonstrated, allowing coupling from the MCF cores to 340x400 nm Si waveguides. Development of a low-power VCSEL driver with integrated feed-forward equalizer is reported, allowing PAM-4 modulation of a bandwidth-limited VCSEL beyond 25 Gbaud. The second platform, developed within the frames of the European project PHOXTROT, considers the use of modulation formats of increased complexity in the context of optical interconnects. Powered by the evolution of DSP technology and towards an integration path between inter and intra datacenter traffic, this platform investigates optical interconnection system concepts capable to support 16QAM 40GBd data traffic, exploiting the advancements of silicon and polymer technologies.

Experimental Demonstration of an Elastic Packet Routing Node Based on OCDMA Label Coding

We propose and demonstrate experimentally an all-optical packet routing scheme using hybrid-wavelength-division multiplexing/optical-code-division multiple access labeling for 40-Gb/s nonreturn-to-zero (NRZ) data. With no electronic control, the system forwards asynchronously packets delimited by valid label and suppresses unwanted traffic. It consists of an optical flip-flop controlled by two correlators combined with a Mach-Zehnder interferometer that selects packets for each fiber output. The experimental results show optical switching operation for the optical-code gate with an extinction ratio of 16 dB between the switched and unswitched packets and a switching time below 2 ns. Error-free operation has been successfully achieved with low-power penalty for 40-Gb/s NRZ data.