Gideon Intrater
National Semiconductor
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Publication
Featured researches published by Gideon Intrater.
international conference on computer design | 1990
Gideon Intrater; Dan Biran
An alternative approach for embedded system processor architecture is presented. Methods to evaluate and define the modules within such a processor are discussed. Three examples of new embedded system processors from the National Semiconductors 32000/EP family are described. These are: the integrated system processor NS32CG160 developed for laser beam printer applications; the embedded system processor NS32GX320 for laser/FAX applications; and the imaging signal processor NS532FX16 designed for Group 3 FAX machines. Integration of system components and improved internal organization should deliver better solutions for the embedded application designer.<<ETX>>
international conference on computer design | 1992
Ohad Falik; Gideon Intrater
A digital signal processing capability that allows data compression and the use of cost effective memories, both fundamental to digital answering machines (DAMs), is reported. It is provided by a three-chip cluster, tuned to the DAM application and based on the NS32AM160. This cluster offers a solution to both the processing power and system integration requirements.<<ETX>>
IEEE Transactions on Computers | 1994
Gideon Intrater; Ilan Y. Spillinger
A Decoded INstruction Cache (DINC) is a buffer between the instruction decoder and other instruction pipeline stages. In this paper, we explain how techniques that reduce the branch penalty on a DINC, can improve CPU performance. We also analyze the impact of some of the design parameters of DINCs on variable instruction length computers. Our study indicates that tuning the mapping of the instructions into the cache can improve performance substantially. Tuning must be based on the instruction length distribution for a specific architecture. In addition, the associativity degree has a greater effect on the DINCs performance than on the performance of regular caches. We discuss the difference between the performance of DINCs and other caches, when longer cache lines are used. We present a model to estimate the miss rate based on its characteristics, that are discussed and analyzed throughout this paper. Our conclusions are based on both analytical study and trace driven simulations of several integer UNIX applications. >
Archive | 1995
James Scott Johnson; Tim Short; Gideon Intrater
Archive | 1990
Amos Intrater; Moshe Doron; Gideon Intrater; Lev Epstein; Maurice Valentaten; Israel Greiss
Archive | 1992
Donald B. Alpert; Oved Oz; Gideon Intrater; Reuven Marko; Alon Shacham
Archive | 1998
Ohad Falik; Ophir Shabtay; Gideon Intrater; Tzvia Weisman
Archive | 1997
Gideon Intrater; Ohad Falik; Aharon Ostrer; Yair Baydatch; Alberto Sandbank
Archive | 1990
Gideon Intrater; Dan Biran
Archive | 1994
Gideon Intrater; Oved Oz; Yachin Afek