Yachin Afek

Circuit methods for the integration of low voltage (1.1-1.8V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes

Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip ICs without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1..8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 MHz and a digital supply voltage of 2.5 V.