Gil Yong Chung

Homoepitaxial Growth of 4H-SiC Using a Chlorosilane Silicon Precursor

Epitaxial growth of SiC films was performed on 4H SiC n+ substrates utilizing a chlorosilane/propane chemistry in both single wafer and batch CVD systems. Variations of the chlorosilane flow under fixed conditions of gas composition, temperature and pressure resulted in growth rates between 4 to 20 μm/hr. Fixing the chlorosilane flow rate to achieve a growth rate of approximately 4 μm/hr, the effects of temperature, pressure and gas composition on background dopant incorporation, epitaxial layer uniformity and epitaxial defect generation were investigated. Intentional n and p-type doping has been demonstrated over the carrier range 1×1018-1×1020/cm3. This paper presents the first reported of use of chlorosilane precursors to grow high quality undoped, n and p doped SiC epilayers.

Scaling of Chlorosilane SiC CVD to Multi-Wafer Epitaxy System

A SiC epitaxy process based on chlorosilane/propane chemistry has been successfully transferred from a single-wafer R&D system to a multi-wafer CVD reactor. The optimized process results in very smooth epi surface (RMS~0.24nm) and minimum surface pits (less than 0.5/cm2). Both n-type and p-type doping in a wide range are demonstrated using nitrogen and aluminum, respectively. The high performance benchmarks for thickness uniformity (intra-wafer variation <1% and inter-wafer variation <1%) and doping uniformity (intra-wafer variation <6% and inter-wafer variation <3%) are achieved on 5 x 3-inch wafers. The carrier lifetime in these epilayers measured by μ-PCD is over 5 μs, the longest value reported so far for SiC epitaxial wafers.

The Nucleation and Propagation of Threading Dislocations with c-Component of Burgers Vector in PVT-Grown 4H-SiC

Studies of threading dislocations with Burgers vector of c+a have been carried out using synchrotron white beam X-ray topography. The nucleation and propagation of pairs of opposite sign threading c+a dislocations is observed. Overgrowth of inclusions by growth steps leads to lattice closure failure and the stresses associated with this can be relaxed by the nucleation of opposite sign pairs of dislocations with Burgers vector c+a. Once these dislocations are nucleated they propagate along the c-axis growth direction, or can be deflected onto the basal plane by overgrowth of macrosteps. For the c+a dislocations, partial deflection can occasionally occur, e.g. the a-component deflects onto basal plane while the c-component continuously propagates along the growth direction. One factor controlling the details of these deflection processes is suggested to be related to the ratio between the height of the overgrowing macrostep and that of the surface spiral hillock associated with the threading growth dislocations with c-component of Burgers vector.

A New Method of Mapping and Counting Micropipes in SiC Wafers

Micropipes are considered to be a major device killer in SiC wafers. Developing a method to count and map micropipes efficiently and accurately has been a challenging task to date. In this work, a new method based on KOH etching and full wafer, high resolution digital imaging is developed to map and count micropipes in both conductive and semi-insulating SiC wafers. This method is also compared with a non-destructive method based on laser light scattering and a good agreement between the two methods is demonstrated.

Measurement of Critical Thickness for the Formation of Interfacial Dislocations and Half Loop Arrays in 4H-SiC Epilayer via X-Ray Topography

Synchrotron X-ray Beam Topography (SWBXT) and KOH etching observations are presented of interfacial dislocations (IDs) and half-loop arrays (HLAs) which can form under certain growth conditions during homoepitaxy of 4H-SiC on off-cut substrates. The HLAs and IDs are observed to form from pairs of opposite sign basal plane dislocations in the substrate which intersect the substrate surface in screw orientation. These dislocations glide in opposite direction in the epilayer once critical thickness has been exceeded. Half-loop arrays are formed at the same time as the screw-type basal plane dislocations (BPDs) side-glide inside the epilayer. From knowledge of the formation mechanism of the HLAs [, if the line of the HLA is extended to intersect the original threading dislocation line direction, then the distance between this intersection point and the ID along the line direction of the original BPD provides a measure of the critical thickness. It is also calculated that the critical thickness in this case is largely determined by the mutual attractive force between the pairs of opposite sign threading BPDs in the substrate. In addition we observed both interfacial dislocations and HLAs generated from: (a) surface sources of BPDs; (b) micropipes; (c) 3C inclusions; and (d) substrate/epilayer interface scratches.

A Study of Nitrogen Incorporation in PVT Growth of n+ 4H SiC

A detailed understanding of the incorporation of N2 gas during PVT growth of SiC is required to achieve high performance, low resistivity n+ SiC substrates necessary for power device applications. In this report, nitrogen incorporation is investigated for growth of 4H SiC crystals from 2” to 3” diameter in conditions ranging from unintentionally doped to low resistivity (0.015 - cm). For a wafer in a particular boule a resistivity uniformity of ± 5% is typical although the uniformity decreases when the wafer orientation is cut off axis from the bulk growth direction. Within a boule growth, the nitrogen incorporation is found to be a function of growth time. As growth continues, the resistivity of wafers cut further from the seed increases. A typical 3” on axis sliced wafer has a within wafer resistivity uniformity of 5% compared with an average seed to tail variation of 10%. Due to the axial resistivity gradient the within wafer resistivity uniformity of off axis sliced wafers is 8%. These axial and radial gradients are thought to be a function of the changing C/Si ratio during growth. Nitrogen incorporation as a function of PVT geometry, N2 partial pressure, and growth temperature are investigated and discussed. In particular, nitrogen incorporation is found to depend on the crucible size and nitrogen partial pressure, but is not strongly dependent on the absolute growth temperature, for growth temperature ranging over 150°C. Modeling of PVT growth shows the axial resistivity gradient can be linked with a change in the C/Si ratio versus time. Trends and N2 gas incorporation behavior will be discussed using resistivity mapping, SIMS, and Hall effect data.

Study of V and Y Shape Frank-Type Stacking Faults Formation in 4H-SiC Epilayer

Nomarski optical microscopic, KOH etching and synchrotron topographic studies are presented of faint needle-like surface morphological features in 4H-SiC homoepitaxial layers. Grazing incidence synchrotron white beam x-ray topographs show V shaped features which transmission topographs reveal to enclose 1/4[0001] Frank-type stacking faults. Some of these V-shaped features have a tail associated with them and are referred to as Y-shaped defects. Geometric analysis of the size and shape of the V-shaped faults indicates that they are fully contained within the epilayer and appear to be nucleated at the substrate/epilayer interface. Detailed analysis shows that the positions of the V-shaped stacking faults match with the positions of c-axis threading dislocations with Burgers vectors of c or c+a in the substrate and thus appear to result from the deflection of these dislocations onto the basal plane during epilayer growth. Similarly, the Y-shaped defects match well with the substrate surface intersections of c-axis threading dislocations with Burgers vectors of c or c+a in the substrate which were deflected onto the basal plane during substrate growth. Based on the observed morphology of these defect configurations we propose a model for their formation mechanism.

Quantitative Comparison Between Dislocation Densitiesin Offcut 4H-SiC Wafers Measured Using SynchrotronX-ray Topography and Molten KOH Etching

AbstractMolten KOH etching and x-ray topography have been well established as two of the major characterization techniques used for observing as well as analyzing the various crystallographic defects in both substrates and homoepitaxial layers of silicon carbide. Regarding assessment of dislocation density in commercial wafers, though the two techniques show good consistency in threading dislocation density analysis, significant discrepancy is found in the case of basal plane dislocations (BPDs). In this paper we compare measurements of BPD densities in 4-inch 4H-SiC commercial wafers assessed using both etching and topography methods. The ratio of the BPD density calculated from topographic images to that from etch pits is estimated to be larger than 1/sinθ, where θ is the offcut angle of the wafer. Based on the orientations of the defects in the wafers, a theoretical model is put forward to explain this disparity and two main sources of errors in assessing the BPD density using chemical etching are discussed.

Non-Equilibrium Carrier Diffusion and Recombination in Semi-Insulating PVT Grown Bulk 6H-SiC Crystals

We applied a non-degenerate four wave mixing (FWM) technique to investigate carrier generation, diffusion and recombination processes in PVT-grown semi-insulating wafers of 6H-SiC at 300 K. The resistivity of samples, cut from different places of a boule as well as from different boules, varied in range from a few ⋅cm up to 1010 ⋅cm. Interband excitation (at 355 nm) and below bandgap excitation (at 532 nm) allowed to study dynamics of the bipolar plasma and the contribution of deep levels to carrier generation and recombination. The nonequilibrium carrier lifetime was shorter in the samples of higher resistivity, in accordance with the increasing density of deep levels. The bipolar plasma diffusion in high-resistivity samples (~109 ⋅cm) provided the value of the diffusion coefficient D = 4.4 cm2/s and hole mobility μh = (88 ± 6) cm2/Vs.

Progress in Growth of Thick Epitaxial Layers on 4 Degree Off-Axis 4H SiC Substrates

This paper reports the progress of the thick epitaxy development at Dow Corning. Epiwafers with thickness of 50 – 100 m have been grown on 4° off-axis 76mm 4H SiC substrates. Smooth surface with RMS roughness below 1nm and defect density down to 2 cm-2 are achieved for 80 - 100 m thick epiwafers. Long carrier lifetime of 2 – 4 s are routinely obtained, and low BPD density in the range of 50 down to below 10 cm-2 is confirmed. High voltage JBS diodes have been successfully fabricated on these wafers with thick epitaxial layers.