Gin-Kou Ma

Intelligent handoff for mobile wireless internet

This paper presents an intelligent mobility management scheme for Mobile Wireless InterNet – MWIN. MWIN is a wireless service networks wherein its core network consisting of Internet routers and its access network can be built from any Internet-capable radio network. Two major standards are currently available for MWIN, i.e., the mobile IP and wireless LAN. Mobile IP solves address mobility problem with the Internet protocol while wireless LAN provides a wireless Internet access in the local area. However, both schemes solve problems independently at different layers, thereby some additional problems occur, e.g., delayed handoff, packet loss, and inefficient routing. This paper identifies these new problems and performs analyses and some real measurements on the handoff within MWIN. Then, a new handoff architecture that extends the features of both mobile IP and wireless LAN handoff mechanism was proposed. This new architecture consists of mobile IP extensions and a modified wireless LAN handoff algorithm. The effect of this enhancement provides a linkage between different layers for preventing packet loss and reducing handoff latency. Finally, some optimization issues regarding network planning and routing are addressed.

Fast Transient DC-DC Converter with On-Chip Compensated Error Amplifier

A novel fast transient DC-DC converter with on-chip compensated error amplifier is presented in this paper. The error amplifier uses on-chip current-mode Miller capacitor to replace a large off-chip capacitor. Only three transistors and one voltage follower are used to implement this novel architecture. Not only on-chip compensated error amplifier is implemented without off-chip components and I/O pins, but also it can have fast transient response. Furthermore, we accurately decrease the transient response time without suffering from the oscillation issue. Experimental results demonstrate the stability and the fast transient response of the DC-DC converters.

High-linearity and temperature-insensitive 2.4 GHz SiGe power amplifier with dynamic-bias control

A high-linearity and temperature-insensitive 2.4 GHz power amplifier (PA) with dynamic-bias control is realized in a SiGe HBT technology with 0.9 /spl mu/m emitter width. Due to the bias linearization, the P/sub 1dB/ of 27 dBm is only 0.5 dB lower than P/sub sat/, which is the record low to the best of our knowledge. With simple temperature-insensitive bias, the total current deviations from the room temperature values are smaller than 6% and 10% at the linear P/sub out/ (24/20 dBm) for 802.11b and 802.11g, respectively, at the test temperatures from 0/spl deg/C to 85/spl deg/C. The integrated power detector has a wide dynamic range of 20 dB. The DC current can be reduced to 53 mA and the power-added-efficiency (PAE) can be enhanced up to 3 times at low P/sub out/ level under dynamic-bias control operation, and meanwhile the 802.11b/g linearity requirements are achieved. This design is most suitable for the future 802.11n application due to its high linearity.

Coupling effects of dual SiGe power amplifiers for 802.11n MIMO applications

The large-signal and small-signal coupling effects of dual SiGe power amplifiers (PAs) on a single chip for 802.11n multiple input multiple output (MIMO) applications are demonstrated for the first time. Deep trench isolation and grounded guard ring are used for crosstalk isolation at both transistor and circuit levels. The equivalent small-signal coupling at 2.45 GHz between two PAs is -30 dB. The PA delivers 18.1 dBm and 16.6 dBm with 3% EVM (OFDM, 64-QAM) in single and dual PA operation modes, respectively. The EVM degradation becomes severe as the relative interfering power level increases

High efficiency buck-boost converter with reduced average inductor current (RAIC) technique

This paper presents a buck-boost converter with high-efficiency and smooth-transition to extend the battery life of portable devices. The new control topology minimizes the switching and conduction losses at the same time even four switches are used. Therefore, over a wide input voltage range, the proposed buck-boost converter with minimum switching loss like the buck or boost converter can reduce the conduction loss through the use of the reduced average inductor current (RAIC) level. Especially, the converter offers good line/load regulation and thus provides a smooth and stable output voltage without being affected by the decreasing battery voltage. Experimental results show that the output voltage is regulated for the whole battery life time and the output transition is very smooth during mode transition. Besides, the output voltage ripple and the average inductor current are effectively minimized by the proposed control scheme. The peak efficiency is 97% and output voltage ripple is reduced from 100mV to within 10mV.

A cell scheduling algorithm for VBR traffic in an ATM multiplexer

An efficient cell scheduling algorithm is proposed for multiplexing traffic sources with variable bit rate requirement in an ATM multiplexer. Three types of traffic sources an assumed in the multiplexer, namely the constant bit rate (CBR), variable bit rate (VBR), and best-effort traffic. For VBR and CBR sources, a statistical bandwidth requirement should be claimed before they are multiplexed in the ATM outgoing link. The proposed algorithm dynamically schedules the traffic and preserves the claimed throughput in the outgoing link for each CBR or VBR source. When there is no cell arrival at the VBR or CBR sources, the proposed algorithm assigns the bandwidth to the best-effort sources. The performance of the proposed algorithm is evaluated via simulation. The result shows that the proposed method has better performance over other static multiplexing schemes such as the weighted round-robin method.

A study of isochronous channel reuse in DQDB metropolitan area networks

The isochronous channel reuse problem (ICRP) on DQDB metropolitan area networks is investigated. Given a set of established isochronous connections and a set of isochronous requests, the goal is to use a minimal number of isochronous channels to service these requests. On the other hand, given a limited isochronous bandwidth, the goal is to establish a maximal number of isochronous connections. In the paper, the authors show that the ICRP is NP-complete. For the simplified ICRP (SICRP), in which all the established isochronous connections as well as the isochronous requests are of the same bandwidth, the authors suggest a tight lower bound and propose an efficient isochronous channel reuse algorithm (ICRA). Simulation results show that for the SICRP, the solutions obtained by the ICRA are very close to the lower bound which implies the proposed ICRA is very attractive. For a limited isochronous bandwidth, the number of successful established isochronous connections obtained by the ICRA is much more than that of the original DQDB isochronous channels allocation scheme.<<ETX>>

Architecture for two-way data services over residential area CATV networks

An architectural design for high speed residential data access using the traditional IEEE 802.3 medium access protocol over the existing CATV network is proposed. The described architecture is attractive in using the existing infrastructure combined with the existing access scheme in the residential area and thus it is cost effective and well suited for home Internet access. However, the traditional CSMA/CD protocol is not suitable for the cable TV network due to its long propagation delay. Thus, we propose to combine the existing IEEE 802.3 CSMA/CD MAC with the segmented cable subnetworks so that a home user can get access to the Internet as if he is using the Ethernet at 10 Mbps, or Fast-Ethernet at 100 Mbps. Only three subcarriers in the passband cable is used and therefore it will not interfere with the traditional broadcasting channels and the future digital video channels. The segmented cable are interconnected by the defined cable bridge (CB) and a simple flow control mechanism is proposed among the CBs. The functional components and operations of each CB are also described. For a fair performance among the subnetworks, a prioritized queueing scheme is also proposed on each CB.

A scalable storage supporting multistream real-time data retrieval

Abstract. This paper presents a new data placement scheme for continuous-media playback via a scalable storage system. Multimedia contents are segmented into data blocks for the purpose of being stored, retrieved, and manipulated. If these data blocks belong to some continuous media, then they must be handled in a timely manner, for example, being retrieved before some deadline. One of the main challenges in implementing the above system is the simultaneous retrieval of a great number of different media streams from a very large storage system. The proposed scheme efficiently reduces the seeking delay by a very simple placement method and a retrieval scheduler. Thus, both the storage capacity and the number of concurrent accesses to the storage are scalable. The performance of the proposed scheme is evaluated through a simple analytical model and a practical prototype implementation.

A RLS bilinear filter for channel equalization

This paper introduces a nonlinear recursive least squares decision feedback equalizer (DFE). The nonlinearity is modeled using a bilinear system. Bilinear models are attractive because of its ability to approximate a large class of nonlinear systems efficiently. Results of computer simulation experiments that compare the performance of the bilinear DFE to two other alternatives, viz., a conventional DFE and a truncated Volterra DFE, in eliminating the intersymbol interference caused by a nonlinear channel are presented. The results demonstrate the superior performance of the bilinear DFE over the competing structures at least for the cases considered.<<ETX>>