Tzu-Yi Yang
Industrial Technology Research Institute
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Publication
Featured researches published by Tzu-Yi Yang.
international solid-state circuits conference | 2006
Che-Fu Liang; Shen-Iuan Liu; Yen-Horng Chen; Tzu-Yi Yang; Gin-Kou Ma
A 14-band frequency synthesizer for UWB application is realized in a 0.18 mum CMOS process. It uses two PLLs and three mixers. The unwanted spurs due to frequency mixing are at least 35dB lower than the output carriers by using a quadrature divide-by-3 circuit and a 2-stage single-sideband mixer. The core circuit area is 1.5 mm2 and the power consumption is 160mW
IEEE Transactions on Circuits and Systems | 2011
Yan Li; Jerry Lopez; Donald Y. C. Lie; Kevin Chen; Stanley Wu; Tzu-Yi Yang; Gin-Kou Ma
This paper discusses the circuits and system design methodology of a highly-efficient wideband RF polar transmitter (TX) using the envelope-tracking (ET) technique for mobile WiMAX applications. Monolithic power amplifiers (PAs) are designed and fabricated in IBM 0.18 μm SiGe BiCMOS technology, and a linear-assisted switch-mode envelope amplifier is applied to modulate the PA supply voltage to form the core of the RF polar TX. Nonlinearities caused by bandwidth limitation of the envelope amplifier and timing misalignment have been investigated. When driven by WiMAX 64QAM 8.75 MHz signals, the overall PAE of our ET-based polar TX system reaches 30.5% at 17 dBm average output power, while also meeting the stringent WiMAX linearity specs without using any predistortion. When the decresting algorithm using the soft limiter is applied to the baseband, the overall PAE increases to 33%, at the expense of a higher EVM of 4.9%. Based on measurement results, our ET-based polar TX system has demonstrated excellent efficiency with good linearity for high peak-to-average ratio (PAR) broadband signals when compared with the recent literature on state-of-the-arts polar TX designs.
radio frequency integrated circuits symposium | 2005
W.-C. Hua; Hung-Hui Lai; Po-Tsung Lin; C. W. Liu; Tzu-Yi Yang; Gin-Kou Ma
A high-linearity and temperature-insensitive 2.4 GHz power amplifier (PA) with dynamic-bias control is realized in a SiGe HBT technology with 0.9 /spl mu/m emitter width. Due to the bias linearization, the P/sub 1dB/ of 27 dBm is only 0.5 dB lower than P/sub sat/, which is the record low to the best of our knowledge. With simple temperature-insensitive bias, the total current deviations from the room temperature values are smaller than 6% and 10% at the linear P/sub out/ (24/20 dBm) for 802.11b and 802.11g, respectively, at the test temperatures from 0/spl deg/C to 85/spl deg/C. The integrated power detector has a wide dynamic range of 20 dB. The DC current can be reduced to 53 mA and the power-added-efficiency (PAE) can be enhanced up to 3 times at low P/sub out/ level under dynamic-bias control operation, and meanwhile the 802.11b/g linearity requirements are achieved. This design is most suitable for the future 802.11n application due to its high linearity.
radio frequency integrated circuits symposium | 2006
W.-C. Hua; Po-Tsung Lin; Chun-Ping Lin; Che-Yung Lin; Huan-Lin Chang; C. W. Liu; Tzu-Yi Yang; Gin-Kou Ma
The large-signal and small-signal coupling effects of dual SiGe power amplifiers (PAs) on a single chip for 802.11n multiple input multiple output (MIMO) applications are demonstrated for the first time. Deep trench isolation and grounded guard ring are used for crosstalk isolation at both transistor and circuit levels. The equivalent small-signal coupling at 2.45 GHz between two PAs is -30 dB. The PA delivers 18.1 dBm and 16.6 dBm with 3% EVM (OFDM, 64-QAM) in single and dual PA operation modes, respectively. The EVM degradation becomes severe as the relative interfering power level increases
international symposium on circuits and systems | 2010
Yan Li; Jerry Lopez; Donald Y. C. Lie; Kevin Chen; Stanley Wu; Tzu-Yi Yang
In this paper, a monolithic RF cascode SiGe power amplifier (PA) design capable of enhancing its power-added efficiency (PAE) is demonstrated. Four RF switches are adopted at the bases of the common-emitter transistors, which can be turned on/off in response to the desired output power. Simulations show that by utilizing device size variation, our cascode PA achieves higher gain and PAE compared to conventional fixed-size cascode PA in the low power region; in addition, it also provides more output power and higher average PAE than single-stage common-emitter PAs. We also studied and compared the linearity performance of our cascode PAs vs. single-stage common-emitter PAs in a RF polar TX using an envelope tracking (ET) technique. We found that even through self-biasing for the common-base device can improve the output distortion of cascode PAs, a single-stage common-emitter SiGe PA designed for comparison is still considerably more linear than cascode PAs. Therefore, more careful system linearization design will be critical when the cascode PAs are adopted in RF polar transmitters (TXs), especially for broadband wireless applications such as mobile WiMAX studied here.
international symposium on circuits and systems | 2009
Yan Li; Jerry Lopez; Donald Y. C. Lie; Kevin Chen; Stanley Wu; Tzu-Yi Yang
In this paper, we report both circuits design and system simulations using highly-efficient monolithic SiGe class-E power amplifier (PA) with an open-loop envelope tracking (ET) technique for mobile WiMAX/Wibro applications. The 1-stage and 2-stage class-E PAs were designed and fabricated in a 0.18µm BiCMOS SiGe technology. The 1-stage class-E PA achieved peak power added efficiency (PAE) of 62% at output power of 21dBm in single-tone measurement. The design of linear-assisted switching envelope amplifier is also discussed, which involves balancing the tradeoff between efficiency and signal fidelity. Detailed co-design system simulations including RF circuits and digital DSP blocks show that our class-E PA can be linearized by the open-loop ET technique, and the entire ET-based transmit (TX) system meets the stringent 802.16e TX mask with ∼33% overall average efficiency at output power of 18.5dBm.
international microwave symposium | 2005
Yen-Horng Chen; Shin-Fu Chen; Ching-Feng Lee; Kai-Cheung Juang; Yeong-Lin Yu; Tzu-Yi Yang
A dual band receiver IC for digital audio broadcasting (DAB) is described in this paper. The chip integrates most of the functions necessary to receive and down convert DAB L-Band (1452 /spl sim/ 1492MHz) and Band3 (174-240 MHz) signals for further baseband processing, including two variable gain LNAs, mixers, VGA, IF amplifiers, L-Band PLL, and Band3 VCO. The overall Band3 receiver gain is 92dB and NF is 4.5dB. L-Band receiver gain is 91dB and NF is 8.9dB. In both bands, gain control ranges are over 84dB and THD remains above 30dBc up to input levels of -14dBm. The linearity and dynamic range of this system can be improved by using an external attenuator that has 20dB variable attenuation. Two AGC stages are implemented in this receiver. With the reference-current-based, programmable AGC design, this receiver provides 8dB range to optimize output level to match the dynamic range of the following A/D converter. The prescalar used in L-band PLL realizes a programmable divide-by-multi-divisor function, 2/sup n/ - 2, 2/sup n/ - 1, 2/sup n/, and 2/sup n/ + 1, by utilizing conventional divide-by-4/5 stage with slow and simple logic timing. This circuit was fabricated in TSMC 0.35 /spl mu/m SiGe process with 3.3V power supply. It consumes 88mA and 65mA for L-Band and Band3 mode, respectively.
international midwest symposium on circuits and systems | 2012
Weibo Hu; Yen-Ting Liu; Vighnesh Das; Cliff Schecht; Tam Q. Nguyen; Donald Y. C. Lie; Tzu-Chao Yan; Chien-Nan Kuo; Stanley Wu; Yuan-Hua Chu; Tzu-Yi Yang
This paper presents a design example of an ultra-low power single-channel analog front-end (AFE) integrated circuits (IC) and system for biomedical sensing applications. The 0.18-μm CMOS AFE IC design includes a low noise instrumentation amplifier (INA), a low-pass filter (LPF), a variable gain amplifier (VGA), and a successive approximation register (SAR) analog-to-digital converter (ADC). The AFE IC architecture is analyzed on the system level to minimize total power consumption with high integration and optimized for an ECG sensing system. SPICE simulations of the AFE IC channel validate the ultra-low power IC design methodology for heartbeat detection with less than 1 μA/channel.
international symposium on vlsi design, automation and test | 2011
Yan Li; Po-Hsing Wu; Jerry Lopez; Ruili Wu; Donald Y. C. Lie; Kevin Chen; Stanley Wu; Tzu-Yi Yang
This paper presents a large-signal envelope-tracking (ET) polar transmitter (TX) system with a monolithic cascode SiGe power amplifier (PA) for mobile WiMAX applications. The envelope amplifiers are designed in the TSMC 0.35µm SiGe BiCMOS technology and also with discrete components for comparisons. The entire polar TX system using the discrete envelope amplifier in measurement achieves the power-added efficiency (PAE) of 30% at the average output power of 18 dBm with the EVM of 5% for WiMAX 64QAM 10 MHz signal. The RF/analog/digital co-simulations of the entire polar TX system with the integrated CMOS envelope amplifier show similar linearity and efficiency performances when compared with the measurement results. Both the simulation and measurement data suggests our polar TX design achieves the highest PAE among the state-of-the-art Si-based OFDM polar TX systems reported in the literature.
radio frequency integrated circuits symposium | 2006
Yen-Horng Chen; Chih-Wei Wang; Ching-Feng Lee; Tzu-Yi Yang; Chih-Fan Liao; Gin-Kou Ma; Shen-Iuan Liu
A direct conversion receiver for MB-OFDM UWB communication systems operating in 3.1-10.6GHz is presented. It integrates a low noise amplifier (LNA), quadrature mixers, and baseband 6th-order channel-select filters with programmable gain. The receive chain provides conversion gain of 77dB with 58dB control range. The NF is about 5.8dB in 3-5GHz, rising to 7.6dB at 8GHz, and still below 9.3dB up to 10GHz. The IIP3 of -10.3dBm and IIP2 of 20.2dBm ensure a linear radio receiver. The circuit is fabricated in 0.18 mum CMOS process and mounted on a Rogers4003 PCB for measurement. It consumes 45mA and 38mA for LNA H/L gain mode from 1.8V supply