Giuseppe Ferla

Heavy Metal Gettering in Silicon‐Device Processing

Heavy metal gettering in silicon devices has been investigated. The best results have been obtained with predeposition followed by annealing at moderate temperature. A model, previously developed for gold, is applied to the description of heavy metal gettering. Once inserted into a standard device process, our gettering step allows us to obtain leakage currents about 100 pA/cm2 and 1 pA/cm for diodes and storage time around 103 sec for capacitors.

Ion‐induced annealing and amorphization of isolated damage clusters in Si

The interaction between high‐energy ion irradiation and pre‐existing damage clusters dispersed in single‐crystal Si is discussed. Silicon substrates were predamaged by low‐dose 150 keV Au ions. Post‐irradiation by 600 keV Kr2+ ions resulted in either damage annealing or damage accumulation, depending on the substrate temperature. The transition temperature between these two different regimes is 420 K. These data are discussed and compared with the ion beam induced epitaxy and amorphization of continuous surface amorphous layers.

Optimization of the tradeoff between switching speed of the internal diode and on-resistance in gold- and platinum-implanted power metal-oxide-semiconductor devices

Diffusion of platinum and gold has been used to reduce minority-carrier lifetime in power metal-oxide-semiconductor devices in order to improve the switching characteristics of the internal diode. Gold thin-film deposition and gold- or platinum-ion implantation techniques have been adopted to realize the prediffusion source. For a given reduction in lifetime, the concomitant increase in the on-resistance of the device, as determined by the forward characteristics, is smaller in gold-implanted than in gold-deposited devices; an even smaller increase in on-resistance is obtained by using platinum implantation. Therefore, ion implantation of platinum in power MOS devices fabrication provides a better tradeoff between static characteristics of the devices and switching speed of their internal diodes. >

Diffusion of ion‐implanted gold in p‐type silicon

We report detailed measurements of gold concentration profiles in 〈100〉, p‐type silicon. The gold has been introduced by ion implantation and diffused in the temperature range 1073–1473 K and for times ranging from 60 s to 100 h. The resistivity profiles have been converted into gold concentration profiles by using the recently measured value of the entropy factor for the ionization of the gold donor level. The measured profiles and their time dependence can be accounted for by the kick‐out diffusion mechanism. The activation energies for the effective diffusion coefficient and for the gold substitutional concentration are 1.7±0.1 and 1.6±0.1 eV, respectively. The resulting flux of silicon self‐interstitials is thus described by an activation energy of 3.3±0.1 eV.

Ion‐induced epitaxial growth of chemical vapor deposited Si layers

Thin layers of Si were chemical vapor deposited onto as‐received 〈100〉 p‐type Si wafers. The samples were subsequently implanted with 1×1015/cm2, 80 keV As. The native oxide film impedes the growth even at 800 °C, 1 h; instead irradiation with 600 keV Kr++ at 450 °C causes the epitaxial growth of the entire deposited and amorphized Si layer. The sheet resistance of these As‐doped layers (130 Ω/⧠) coincides with that of samples in which the amorphous layer was obtained by As ion implantation only. The value is at least ten times lower than that of the polycrystalline layer doped with the same amount of As.

Ion-assisted recrystallization of amorphous silicon

Abstract Our recent work on ion-beam-assisted epitaxial growth of amorphous Si layers on single crystal substrates is reviewed. The planar motion of the crystal-amorphous interface was monitored in situ, during irradiations, by transient reflectivity measurements. This technique allows the measurement of the ion-induced growth rate with a very high precision. We have observed that this growth rate scales linearly with the number of displacements produced at the crystal-amorphous interface by the impinging ions. Moreover the regrowth onto 〈100〉 oriented substrates is a factor of ≈ 4 faster with respect to that on 〈111〉 substrates. Impurities dissolved in the amorphous layer influence the kinetics of recrystallization. For instance, dopants such as As, B and P enhance the ion-induced growth rate while oxygen has the opposite effect. The dependence of the rate on impurity concentration is however less strong with respect to pure thermal annealing. For instance, an oxygen concentration of 1 × 1021 / cm3 decreases the ion-induced growth rate by a factor of ≈ 3; this same concentration would have decreased the rate of pure thermal annealing by more than 4 orders of magnitude. The reduced effects of oxygen during ion-beam crystallization allow the regrowth of deposited Si layers despite the presence of a high interfacial oxygen content. The process is investigated in detail and its possible application to the microelectronic technology is discussed.

Influence of a thin interfacial oxide layer on the ion beam assisted epitaxial crystallization of deposited Si

The epitaxial crystallization of chemical vapor deposited Si layers on 〈100〉 Si substrates with a thin interfacial oxide layer was induced by a 600 keV Kr beam in the temperature range 350–500 °C. During irradiation the single crystal‐amorphous interface velocity was measured in situ by monitoring the reflectivity of He‐Ne laser light. We show that a critical irradiation dose is needed before the interfacial oxide breaks down and epitaxial regrowth can take place. This critical dose depends exponentially on the reciprocal temperature with an activation energy of 0.44 eV.

Implants of 15–50 MeV Boron ions into silicon☆

Boron ions were implanted in floating-zone Si〈100〉 wafers of 2 × 103 Ω cm resistivity at energies in the range 15–50 MeV and for doses between 1013 and 1015 cm−2. The implanted samples were furnance annealed in the temperature range 800–1250 °C. The samples were analysed by spreading resistance profilometry and boron concentrations as low as 1013 cm−3 were measured owing to the low value of the bulk doping. The range distribution for the different implant energies is compared with a numerical analysis based on Bethe electronic energy loss, electronic straggling and single large-angle Rutherford backscattering Good agreements are found for the projected range and the straggling; some discrepancies are evidence, however, in the tail of the dopant distribution. The boron diffusion was measured at 1250 °C for several hours, either in nitrogen or in an oxidant ambient. The diffusion during oxidation is enhanced by about 60%, indicating that interstitials at these temperatures migrate over distances of at least 100 μm.

Diffusion and lifetime engineering in silicon

Diffusion mechanisms in crystalline silicon are reviewed emphasizing the role played by the structural defects like vacancies and self-interstitials. These defects control the diffusion process of some transition metals, such as Au and Pt, which undergo fast long-range diffusion as interstitials and become substitutional by replacing a Si atom in a kick-out reaction. The influence of boundary conditions and sample surfaces on the concentration profiles of these metals are analysed in detail. These profiles can be precisely tailored using ion-implantation to achieve a low fluence diffusion source. Fine tuning of the metal profiles is shown to improve greatly the trade-off between dynamic and static characteristics of some silicon power devices like metal-oxide-semiconductor field effect transistors. Moreover, the possibility to obtain a preferential reduction of lifetime by metal doping in a selected area of a semiconductor device is demonstrated.

A 900-MHz RFID system with TAG-antenna magnetically-coupled to the die

A novel UHF-RFID system which employs a magnetic coupling between the die of a TAG and its external antenna is presented. With respect to the state-of-the-art, the proposed solution avoids the physical connection between die and antenna, thus significantly improving TAG reliability while reducing assembling costs. Thanks to the integrated spiral, on-wafer wireless testing can be performed thus greatly reducing testing costs. Moreover, the arrangement exploiting the TAG-antenna and its interface to the IC is well-suited to be implemented in a low-cost roll-to-roll process by using conductive inkjet on any dielectric material.