Gopalakrishnan Vijayan

New algorithms for the rectilinear Steiner tree problem

An approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST), is discussed. The main idea in this approach is to find layouts for the edges of the MST that maximize the overlaps between the layouts, thus minimizing the cost (i.e. wire length) of the resulting rectilinear Steiner tree. Two algorithms for constructing rectilinear Steiner trees from MSTs, which are optimal under the conditions that the layout of each edge of the MST is an L shape or any staircase, respectively, are described. The first algorithm has linear time complexity and the second algorithm has a higher polynomial time complexity. Steiner trees produced by the second algorithm have a property called stability, which allows the rerouting of any segment of the tree, while maintaining the cost of the tree, and without causing overlaps with the rest of the tree. Stability is a desirable property in VLSI global routing applications. >

Optimal node ranking of trees

Abstract We discuss the problem of ranking nodes of a tree, which is a restriction of the general node coloring problem. A tree is said to have rank number k if its vertices can be ranked using the integers 1, 2,…,k such that if two nodes have the same rank i, then there is a node with rank greater than i on the path between the two nodes. The optimal rank number of a tree gives the minimum height of its node separator tree. We present an O(n log n) algorithm for optimal node ranking of trees.

Layer assignment for multichip modules

The layer assignment problem that arises in the design of a multichip module, a high-performance compact package for the interconnection of several hundred chips, is studied. The aim is to place each net in a x-y pair of layers, so as to minimize the number of such pairs. An approximation algorithm, running in O(nd) time is presented for minimizing the number of layers, where n is the number of nets and d is the (two-dimensional) density of the problem. >

On an edge ranking problem of trees and graphs

Abstract A k-edge ranking of an undirected graph is a labeling of the edges of the graph with integers 1, 2, …, k, with the property that all paths between two edges with the same label i contain an edge with label j[rang]i. The edge ranking problem is that of finding the smallest k for which a graph has a k-edge ranking. This problem is useful in the optimization of the number of parallel stages required to assemble a product from its components. The problem is also related to that of finding minimum height edge partition trees of graphs. The main result in the paper is an O(n log n) time approximation algorithm for edge ranking of trees, which has a worst case performance ratio of 2.

A New Approach to the Rectilinear Steiner Tree Problem

We discuss a new approach to constructing the rectilinear Steiner tree (RST) of a given set of points in the plane, starting from a minimum spanning tree (MST). The main idea in our approach is to determine L-shaped layouts for the edges of the MST, so as to maximize the overlaps between the layouts, thus minimizing the cost (i.e., wire length) of the resulting RST. We describe a linear time algorithm for constructing a RST from a a MST, such that the RST is optimal under the restriction that the layout of each edge of the MST is an L-shape. The RSTs produced by this algorithm have 8-33% lower cost than the MST, with the average cost improvement, over a large number of random point sets, being about 9%. The running time of the algorithm on an IBM 3090 processor is under 0.01 seconds for point sets with cardinality 10. We also discuss a property of RSTs called stability under rerouting, and show how to stabilize the RSTs derived from our approach. Stability is a desirable property in VLSI global routing applications.

A new method for floor planning using topological constraint reduction

An approach to the constraint-based floor planning of flexible, fixed, and preplaced blocks that is based on the removal of redundant constraints and the reshaping of flexible blocks is discussed. A floor plan is said to respect a given constraint set if is satisfies either a vertical or a horizontal constraint in the set for each pair of blocks. The approach presented is to construct a floor plan of optimal area that respects the input constraint set, which is assumed to be derived from a relative placement of the blocks. Reasons for considering this method are delineated, and a heuristic floor-planning algorithm based on constraint reduction and block reshaping is given. A simple example illustrates the algorithm. Several real floor-planning examples are also given. >

Optimized test application timing for AC test

The problems associated with optimization of the test application timing for a class of test equipment are identified. Two approaches to test application timing are introduced. The notion of slack is used to define the objective function for optimization. The optimization problem is shown to be NP-complete even for nonreconvergent-fanout circuits. Heuristics for the optimization problems are presented, and the results are compared with bounds on test circuits. >

Partitioning logic on graph structures to minimize routing cost

The problem of partitioning logic onto the vertices of a partition graph G such that the cost of routing the global nets of the partition on the edges of G is minimized is discussed. This is referred to as the min-cost partitioning on a graph (MCPG) problem. The MCPG problem generalizes previously studied partitioning problems, such as classical min-cut, the quadrisection approach, min-cost tree partitioning, and multiple way network partitioning. Some applications of this partitioning model are discussed, a framework for its solution is described, and experimental results are presented. >

Generalization of min-cut partitioning to tree structures and its applications

A generalization of the min-cut partitioning problem, called min-cost tree partitioning, is introduced. In the generalized problem. the nodes of a hypergraph G are to be mapped onto the vertices of a tree structure T, and the cost function to be minimized is the cost of routing the hyperedges of G on the edges of T. The standard min-cut problem is the simple case in which the tree T is a single edge connecting two vertices. Several VLSI design applications for this problem are discussed. An iterative improvement heuristic for this problem in which nodes of the hypergraph are moved between the vertices of the tree is described. The running time of a single pass of the heuristic for the unweighted version of the problem is Q(P*D*t/sup 3/), where P is the total number of pins in the hypergraph G, D is the maximum number of nodes in a hyperedge of G, and t is the number of vertices in the tree T. Several test results are discussed. >

Min-Cost Partitioning on a Tree Structure and Applications

We introduce a generalization of the min-cut partitioning problem, called Min-Cost Tree Partitioning, in which the nodes of an hypergraph G are to be mapped on to the vertices of a tree structure T, and the cost function to be minimized is the cost of routing the hyperedges (i.e., the nets) of G on the edges of T. We discuss several interesting VLSI design applications for this problem. We describe an iterative improvement heuristic for solving this problem.