Gota Kano

A new heterojunction gate GaAs FET

A new type of GaAs JFET having a heterojunction gate is proposed. The structure involves epitaxially grown layers of n-GaAs for the channel and of p-GaAlAs for the gate which can be easily delineated by the self-alignment technology using an overgrown p-GaAs. The potential advantages of the heterojunction structure for GaAs FETs over the conventional Schottky barrier are in the fewer masks for fabrication and the short channels expected. Some preliminary experimental results on fabrication technologies and dc characteristics of the new devices are described.

Molybdenum‐Silicon Schottky Barrier

An ideal metal‐semiconductor Schottky barrier contact was made by chemically depositing thin films of molybdenum on n‐type silicon by the hydrogen reduction of molybdenum pentachloride at temperatures between 390°C and 500°C. Current‐voltage, capacity‐voltage, and photoelectric measurements were used to investigate the characteristics of molybdenum‐silicon diodes thus produced. The junction is shown to be very close to the ideal Schottky barrier with the barrier height measured with respect to the Fermi energy of 0.57±0.02 eV.

Reverse characteristics of Mo-Si epitaxial Schottky diodes

The characteristics of a metal-semiconductor Schottky barrier diode, in which the semiconductor part consists of a heavily doped substrate ( sim 10^{-3} Ω.cm) with a thin (∼ 1 µ) epitaxial layer which is much less heavily doped (-∼ 1 Ω.cm) on top of it, were studied. The electric field distribution calculations showed that, for all practical cases, the penetration of the depletion layer into the substrate could be neglected. Expressions for the capacitance-voltage characteristics, the image force barrier lowering effects, and the avalanche breakdown voltages were derived. The expressions can be verified experimentally on Mo-Si Schottky diodes.

Avalanche Breakdown Voltages in Punch-Through Si Epitaxial Planar Schottky Barrier Diodes

Avalanche breakdown voltages in punch-through epitaxial Schottky barrier diodes have been calculated by the computor more fundamentally than previously reported by the author. And the experimental results obtained in this paper by introducing a new technique–Insertion of Channel-Stopping Guard Space–have approached to this theoretical limit.

Experiment on the Evaluation of Metal-Semiconductor Schottky Barriers

The forward voltage dependence of the n value, carrier storage effects and the excess noise, were measured for ideal Schottky barriers and non ideal Schottky barriers. The experimental results of non ideal Schottky barriers were explained by assuming the effects of the interfacial layer and the effects of donor surface states. The discussions made in this paper can be extended to the general evaluation of the Schottky barriers.

A New Heterojunction-Gate GaAs FET

A new type of GaAs JFET having a heterojunction gate is proposed. The structure involves epitaxially grown layers of n-GaAs for the channel and of p-GaAlAs for the gate which can be easily delineated by the self-alignment technology using an overgrown p-GaAs. The potential advantages of the heterojunction structure for GaAs FETs over the conventional Schottky barrier are in the fewer masks for fabrication and the short channels expected. Some preliminary experimental results on fabrication technologies and dc characteristics of the new devices are described.