Gregory J. Mann

Processor for determining physical lane skew order

Network for increasing transmit link layer core speed

Apparatus and method for implementing an integrated circuit IP core library architecture

CYCLIC REDUNDANCY CHECK GENERATION CIRCUIT

Dynamic critical path detector for digital logic circuit paths

APPARATUS FOR PIPELINED CYCLIC REDUNDANCY CHECK CIRCUIT WITH MULTIPLE INTERMEDIATE OUTPUTS

SYSTEM AND METHOD FOR ARBITRATION BETWEEN SHARED PERIPHERAL CORE DEVICES IN SYSTEM ON CHIP ARCHITECTURES

Multilevel parallel CRC generation and checking circuit

Scalable cyclic redundancy check circuit

Cyclic redundancy check generating circuit