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Gregory S. Mathews

Intel

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Publication

Featured researches published by Gregory S. Mathews.

Archive | 1992

Method and apparatus for independently stopping and restarting functional units

Eugene P. Matter; Yahya Sotoudeh; Gregory S. Mathews

Archive | 1991

Transparent system interrupt

James P. Kardach; Gregory S. Mathews; Cau Nguyen; Sung S. Cho; Kameswaran Sivamani; David Vannier; Shing Wong; Edward Zager

Archive | 2003

System and method for translation buffer accommodating multiple page sizes

Gregory S. Mathews

Archive | 1991

Cache memory hierarchy having a large write through first level that allocates for CPU read misses only and a small write back second level that allocates for CPU write misses only

Gregory S. Mathews; Edward Zager

Archive | 1992

Computer system with interrupts transparent to its operating system and application programs

James P. Kardach; Gregory S. Mathews; Cau Nguyen; Sung S. Cho; Kameswaran Sivamani; David Vannier; Shing Wong; Edward Zager

Archive | 1996

Multi-processing cache coherency protocol on a local bus

Ketan Bhat; Gregory S. Mathews

Archive | 1998

Dual-ported, pipelined, two level cache system

John Wai Cheong Fu; Dean Mulla; Gregory S. Mathews; Stuart E. Sailer

Archive | 1999

Method and apparatus for advancing load operations

Judge K. Arora; Gregory S. Mathews; Ghassan Khadder; Sreenivas A. Reddy

Archive | 1993

Method and apparatus for reduced latency in hold bus cycles

Gregory S. Mathews; Deepak J. Aatresh; Sanjay Jain

Archive | 1992

Central processing unit address pipelining

Deepak J. Aatresh; Tosaku Nakanishi; Gregory S. Mathews

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John Wai Cheong Fu

Intel

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Stuart E. Sailer

Intel

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Dean Mulla

Intel

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Edward Zager

Intel

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John H. Crawford

Intel

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Ghassan Khadder

Intel

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Jeng-Jye Shaw

Intel

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Cau Nguyen

Intel

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David Vannier

Intel

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Deepak J. Aatresh

Intel

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