Guangming Yin

A high-frequency and high-resolution fourth-order /spl Sigma//spl Delta/ A/D converter in BiCMOS technology

A high-performance cascaded sigma-delta modulator is presented. It has a new three-stage fourth-order topology and provides functionally a maximum signal to quantization noise ratio of 16 bits and 16.5-bit dynamic range with an oversampling ratio of only 32. This modulator is implemented with fully differential switch-capacitor circuits and is manufactured in a 2-/spl mu/m BiCMOS process. The converter, operated from +/-2.5 V power supply, +/-1.25 V reference voltage and oversampling clock of 48 MHz, achieves 97 dB resolution at a Nyquist conversion rate of 1.5 MHz after comb-filtering decimation. The power consumption of the converter is 180 mW. >

A 16-b 320-kHz CMOS A/D converter using two-stage third-order Sigma Delta noise shaping

The design and measured performance of a two-stage third-order Sigma Delta (sigma-delta) analog-to-digital (A/D) converter is described. The A/D converter achieves a 96-dB dynamic range and a maximum signal-to-noise-plus-distortion ratio (S/(N+D)) r.m.s./r.m.s. of 93 dB with 320-kHz output rate and an oversampling ratio of 64. An analysis of the integrator gain error is presented. The modulator is realized in a 1.2- mu m double-metal single-poly CMOS process with an active area of 1.6 mm/sup 2/. This modulator operates from a 5-V power supply and a single reference voltage. >