Guglielmo Fortunato

High-field-effect-mobility pentacene thin-film transistors with polymethylmetacrylate buffer layer

A thin film of polymethylmetacrylate (PMMA) acting as a buffer layer has been employed in order to fabricate high-quality pentacene thin-film transistors (TFTs), both in bottom contact and top contact configuration. A PMMA buffer layer allows to reduce the interaction between a π-conjugated system of pentacene and the metal or dielectric substrate. We show that a thin PMMA buffer layer improves crystal quality along the metal contacts’ boundaries, while still allowing good ohmic contact. Pentacene TFTs, including a PMMA buffer layer, show very high field-effect mobility, μFE=0.65 and 1.4cm2∕Vs, for bottom and top contact configuration, respectively, and remarkable steep subthreshold region.

Aging effects in pentacene thin-film transistors: Analysis of the density of states modification

Field effect analysis has been employed in order to calculate the density of states of high quality pentacene thin-film transistors. The degradation of the electrical characteristics caused by the exposure to air has been studied and discussed in term of density of states modification. The calculated density of the states has been approximated by two exponential terms, as in amorphous silicon, and it has been used in a two-dimensional numerical simulation in order to reproduce the electrical characteristic variation with respect of the temperature and aging time.

Controlling field-effect mobility in pentacene-based transistors by supersonic molecular-beam deposition

We show that pentacene field-effect transistors, fabricated by supersonic molecular beams, have a performance strongly depending on the precursor’s kinetic energy (KE). The major role played by KE is in achieving highly ordered and flat films. In the range KE≈3.5–6.5eV, the organic field effect transistor linear mobility increases of a factor ∼5. The highest value (1.0cm2V−1s−1) corresponds to very uniform and flat films (layer-by-layer type growth). The temperature dependence of mobility for films grown at KE>6eV recalls that of single crystals (bandlike) and shows an opposite trend for films grown at KE⩽5.5eV.

Invited) Short Channel Effects and Drain Field Relief Architectures in Polysilicon TFTs

Applications of polycrystalline silicon (polysilicon) thin film transistors (TFTs) to active matrix organic light emitting displays require further performance improvement. The biggest leverage in circuit performance can be obtained by reducing channel length from the typical current values of 3-6μm to 1μm, or less. However, short channel effects and hot-carrier induced instability in scaled down conventional self-aligned polysilicon TFTs can substantially degrade the device characteristics. To reduce these effects and allow proper operation of the circuits, drain field relief architectures have to be introduced. In this work we show that a fully self-aligned gate overlapped lightly doped drain (LDD) structure, with submicron LDD regions, can provide an excellent solution, allowing effective short channel effect control and improved electrical stability.