Guillermo Lao

850V NMOS driver with active outputs

This paper describes a unique second generation fully integrated NMOS device operating at up to 850V. The 5.46×5.26 mm2chip consists of 16 pull-up/pull-down high voltage output drivers, a 16 bit shift register, and gating logic. The HV output drivers are comprised of two high voltage transistors and a polysilicon pull-up resistor, fabricated on a 70Ω-cm substrate, without dielectric isolation or epitaxial material. The high voltage transistors have closed geometry with a two layer polysilicon field plate. One layer of the field plate has high sheet resistance to set the surface potential above the n- drift region. The low voltage logic is standard TTL compatible NMOS, isolated from the high voltage by a grounded barrier. An analysis of the high voltage transistors, based on a solution of Poissons Equation1is presented which emphasizes the effect of the overlaying metal line on the transisors performance.