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Dive into the research topics where Guo Xing Duan is active.

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Featured researches published by Guo Xing Duan.


IEEE Transactions on Nuclear Science | 2014

Bias dependence of total ionizing dose effects in SiGe-SiO2HfO2 p MOS FinFETs

Guo Xing Duan; Cher Xuan Zhang; En Xia Zhang; Jordan A. Hachtel; Daniel M. Fleetwood; Ronald D. Schrimpf; Robert A. Reed; Michael L. Alles; Sokrates T. Pantelides; Gennadi Bersuker; Chadwin D. Young

The total ionizing dose (TID) response of double-gate SiGe- SiO<sub>2</sub>/HfO<sub>2</sub> pMOS FinFET devices is investigated under different device bias conditions. Negative bias irradiation leads to the worst-case degradation due to increased hole trapping in the HfO<sub>2</sub> layer, in contrast to what is typically observed for devices with SiO<sub>2</sub> or HfO<sub>2</sub> gate dielectrics. This occurs in the devices because radiation-induced holes that are generated in the SiO<sub>2</sub> interfacial layer can transport and become trapped in the HfO<sub>2</sub> under negative bias, leading to a more negative threshold voltage shift than observed at 0 V bias. Similarly, radiation-induced electrons that are generated in the SiO<sub>2</sub> interfacial layer can transport into the HfO<sub>2</sub> and become trapped under positive bias, leading to a more positive threshold voltage shift than observed at 0 V bias.


IEEE Transactions on Nuclear Science | 2014

Total Ionizing Dose Effects on hBN Encapsulated Graphene Devices

Cher Xuan Zhang; Bin Wang; Guo Xing Duan; En Xia Zhang; Daniel M. Fleetwood; Michael L. Alles; Ronald D. Schrimpf; Aidan P. Rooney; Ekaterina Khestanova; Gregory Auton; R. V. Gorbachev; Sarah J. Haigh; Sokrates T. Pantelides

The constant-voltage electrical stress and 10-keV X-ray irradiation responses of encapsulated graphene-hBN devices are evaluated. Both constant-voltage stress and X-ray exposure induce only modest shifts in the current and the Dirac point of the graphene. Charge trapping at or near the graphene/BN interface is observed after X-ray irradiation. The experimental results suggest that net hole trapping occurs in the BN at low doses and that net electron trapping occurs at higher doses. First-principles calculations also demonstrate that hydrogenated substitutional carbon impurities at B/N sites at or near the graphene/BN interface can play an additional role in the radiation response of these structures.


Applied Physics Letters | 2016

Degradation and annealing effects caused by oxygen in AlGaN/GaN high electron mobility transistors

Rong Jiang; Xiao Shen; Jin Chen; Guo Xing Duan; En Xia Zhang; Daniel M. Fleetwood; Ronald D. Schrimpf; Stephen W. Kaun; Erin C. H. Kyle; James S. Speck; Sokrates T. Pantelides

Hot-carrier degradation and room-temperature annealing effects are investigated in unpassivated ammonia-rich AlGaN/GaN high electron mobility transistors. Devices exhibit a fast recovery when annealed after hot carrier stress with all pins grounded. The recovered peak transconductance can exceed the original value, an effect that is not observed in control passivated samples. Density functional theory calculations suggest that dehydrogenation of pre-existing ON-H defects in AlGaN plays a significant role in the observed hot carrier degradation, and the resulting bare ON can naturally account for the “super-recovery” in the peak transconductance.


IEEE Transactions on Nuclear Science | 2012

Charge Pumping Measurements of Radiation-Induced Interface-Trap Density in Floating-Body SOI FinFETs

En Xia Zhang; Daniel M. Fleetwood; Guo Xing Duan; Cher Xuan Zhang; Sarah A. Francis; Ronald D. Schrimpf

We demonstrate that, by monitoring source and drain currents during alternating-current gate pulses, reliable estimates of radiation-induced interface-trap density can be obtained for conventional floating-body SOI FinFETs without body contacts. Estimates of effective interface-trap densities are shown for two development stage technologies, before irradiation, and for doses up to 1 Mrad(SiO2). Straightforward estimates of effective interface-trap density are obtained for these floating-body FinFETs, with either a high-K or oxynitride gate dielectric, when the fin width is less than ~70 nm, the channel length is less than ~100 nm, and there is full gate control of the relevant interfaces. This modified charge pumping technique provides estimates of interface-trap density without detailed analysis, adjustable fitting parameters, and/or device simulation, in contrast to DCIV and/or gated-diode techniques. Moreover, this technique enables more accurate estimates of radiation-induced interface-trap density in floating-body FinFETs than midgap charge separation in cases for which isolation leakage contributes significantly to subthreshold current-voltage stretchout.


IEEE Transactions on Device and Materials Reliability | 2015

Activation Energies for Oxide- and Interface-Trap Charge Generation Due to Negative-Bias Temperature Stress of Si-Capped SiGe-pMOSFETs

Guo Xing Duan; Jordan Hatchtel; Xiao Shen; En Xia Zhang; Cher Xuan Zhang; B. R. Tuttle; Daniel M. Fleetwood; Ronald D. Schrimpf; Robert A. Reed; Jacopo Franco; Dimitri Linten; Jerome Mitard; Liesbeth Witters; Nadine Collaert; Matthew F. Chisholm; Sokrates T. Pantelides

We investigate negative-bias temperature instabilities in SiGe pMOSFETs with SiO2/HfO2 gate dielectrics. The measured activation energies for interface-trap charge buildup during negative-bias temperature stress are lower for SiGe channel pMOSFETs with SiO2/HfO2 gate dielectrics and Si capping layers than for conventional Si channel pMOSFETs with SiO2 gate dielectrics. Electron energy loss spectroscopy and scanning transmission electron microscopy images demonstrate that Ge atoms can diffuse from the SiGe layer into the Si capping layer, which is adjacent to the SiO2/HfO2 gate dielectric. Density functional calculations show that these Ge atoms reduce the strength of nearby Si-H bonds and that Ge-H bond energies are still lower, thereby reducing the activation energy for interface-trap generation for the SiGe devices. Activation energies for oxide-trap charge buildup during negative-bias temperature stress are similarly small for SiGe pMOSFETs with SiO2/HfO2 gate dielectrics and Si pMOSFETs with SiO2 gate dielectrics, suggesting that, in both cases, the oxide-trap charge buildup likely is rate-limited by hole tunneling into the near-interfacial SiO2.


IEEE Transactions on Nuclear Science | 2014

Electrical Stress and Total Ionizing Dose Effects on

Cher Xuan Zhang; A.K.M. Newaz; Bin Wang; En Xia Zhang; Guo Xing Duan; Daniel M. Fleetwood; Michael L. Alles; Ronald D. Schrimpf; Kirill Bolotin; Sokrates T. Pantelides

Electrical stress and 10-keV x-ray irradiation and annealing responses are evaluated for back-gate MoS2 transistors. Relative stability of device characteristics is observed for constant-voltage stress. The drain current decreases significantly after both positive and negative bias irradiation. Density functional theory calculations and ozone exposure experiments suggest that O atoms adsorbed on the MoS2 surface during 10-keV x-ray irradiation function as electron traps, causing mobility degradation and voltage shifts.


IEEE Transactions on Device and Materials Reliability | 2016

{\hbox {MoS}}_{2}

Guo Xing Duan; Jordan A. Hachtel; En Xia Zhang; Cher Xuan Zhang; Daniel M. Fleetwood; Ronald D. Schrimpf; Robert A. Reed; Jerome Mitard; Dimitri Linten; Liesbeth Witters; Nadine Collaert; Anda Mocuta; Aaron Thean; Matthew F. Chisholm; Sokrates T. Pantelides

We have measured the low-frequency 1/f noise of Si0.55Ge0.45 pMOSFETs with a Si capping layer and SiO2/HfO2/TiN gate stack as a function of frequency, gate voltage, and temperature (100-440 K). The magnitude of the excess drain voltage noise power spectral density (Svd) is unaffected by negative-bias-temperature stress (NBTS) for temperatures below ~250 K, but increases significantly at higher temperatures. The noise is described well by the Dutta-Horn model before and after NBTS. The noise at higher measuring temperatures is attributed primarily to oxygen-vacancy and hydrogen-related defects in the SiO2 and HfO2 layers. At lower measuring temperatures, the noise also appears to be affected strongly by hydrogen-dopant interactions in the SiGe layer of the device.


IEEE Transactions on Nuclear Science | 2015

Transistors

Liang Wang; En Xia Zhang; Ronald D. Schrimpf; Daniel M. Fleetwood; Guo Xing Duan; Jordan A. Hachtel; Cher Xuan Zhang; Robert A. Reed; Isaak K. Samsel; Michael L. Alles; Liesbeth Witters; Nadine Collaert; Dimitri Linten; Jerome Mitard; Matthew F. Chisholm; Sokrates T. Pantelides; K.F. Galloway

The total ionizing dose response of Ge channel pFETs with raised Si0.55Ge0.45 source/drain is investigated under different radiation bias conditions. Threshold-voltage shifts and transconductance degradation are noticeable only for negative-bias (on state) irradiation, and are mainly due to negative bias-temperature instability (NBTI). Nonmonotonic leakage changes during irradiation are observed, which are attributed to the competition of radiation-induced field transistor leakage and S/D junction leakage.


ieee international conference on solid state and integrated circuit technology | 2014

Effects of Negative-Bias-Temperature-Instability on Low-Frequency Noise in SiGe

Daniel M. Fleetwood; En Xia Zhang; Guo Xing Duan; Cher Xuan Zhang; Isaak K. Samsel; Nicholas C. Hooten; William G. Bennett; Ronald D. Schrimpf; Robert A. Reed; D. Linten; Jerome Mitard

We have investigated single event charge collection and negative-bias instabilities in SiGe pMOSFETs that are of interest for future commercial and space applications. Single-event transient (SET) pulse polarity can depend on the location of the strike along the device channel in ways that differ from SETs in Si-based CMOS devices. The drain bias can significantly affect the total amount of collected charge and peak current values of the SETs in the tested devices. Activation energies for interface-trap buildup during negative bias-temperature stress are lower for SiGe channel pMOSFETs than for Si channel pMOSFETs. Activation energies for oxide-trap charge buildup during negative bias-temperature stress are similar for SiGe pMOSFETs and Si pMOSFETs.


ECS Transactions | 2013

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En Xia Zhang; Daniel M. Fleetwood; Guo Xing Duan; Cher Xuan Zhang; Ronald D. Schrimpf; Eddy Simoen; D. Linten

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Jordan A. Hachtel

Oak Ridge National Laboratory

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Jerome Mitard

Katholieke Universiteit Leuven

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Matthew F. Chisholm

Oak Ridge National Laboratory

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