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Gus Wai-Yan Yeung

IBM

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Publication

Featured researches published by Gus Wai-Yan Yeung.

Archive | 1999

Circuit driver on SOI for merged logic and memory circuits

George McNeil Lattimore; Donald George Mikan; Binta Minesh Patel; Gus Wai-Yan Yeung

Archive | 1999

Sensing circuit for a memory cell array

George McNeil Lattimore; Gus Wai-Yan Yeung

Archive | 1998

Selectable differential or single-ended mode bus

George McNeil Lattimore; Robert J. Reese; Gus Wai-Yan Yeung

Archive | 1999

Apparatus for unaligned cache reads and methods therefor

Terry Lee Leasure; George McNeil Lattimore; Robert Anthony Ross; Gus Wai-Yan Yeung

Archive | 1996

Redundant memory array

George McNeil Lattimore; Terry Lee Leasure; Gus Wai-Yan Yeung

Archive | 1997

Zero-write-cycle memory cell apparatus

Robert Anthony Ross; Gus Wai-Yan Yeung

Archive | 2000

Memory system having a unidirectional bus and method for communicating therewith

George McNeil Lattimore; Younes Lotfi; Robert Anthony Ross; Gus Wai-Yan Yeung

Archive | 1999

System and method for invalidating an entry in a translation unit

Albert Chang; Edward John Silha; Larry Edward Thatcher; Gus Wai-Yan Yeung

Archive | 1996

Self-restore circuit with soft error protection for dynamic logic circuits

Michael Kevin Ciraula; George McNeil Lattimore; Terry Lee Leasure; Gus Wai-Yan Yeung

Archive | 1999

Sense amplifier/comparator circuit and data comparison method

George McNeil Lattimore; Terry Lee Leasure; Younes Lotfi; Robert Anthony Ross; Gus Wai-Yan Yeung

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Collaboration

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George McNeil Lattimore

IBM

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Michael Kevin Ciraula

IBM

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Terry Lee Leasure

IBM

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Robert Anthony Ross

IBM

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Donald George Mikan

IBM

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Younes Lotfi

IBM

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Albert Chang

IBM

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Binta Minesh Patel

IBM

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Edward John Silha

IBM

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John Andrew Beck

IBM

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