Gwang-Geun Lee

The flexible non-volatile memory devices using oxide semiconductors and ferroelectric polymer poly(vinylidene fluoride-trifluoroethylene)

We demonstrated flexible ferroelectric gate thin-film transistors (Fe-TFTs) with ferroelectric polymer poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] and amorphous indium gallium zinc oxide (a-IGZO) channel on the polyethylene-naphthalate (PEN) substrate. First, we confirm basic ferroelectric properties of the P(VDF-TrFE) film on the PEN substrate with various bending radius. Next, we fabricated Fe-TFTs with Al/120 nm-P(VDF-TrFE)/40 nm-IGZO top gate structure. Excellent electrical characteristics are demonstrated and nonvolatile memory function was confirmed with a memory window of 8.4 V. A subthreshold voltage swing of 400 mV/decade, Ion/Ioff ratio of more than 107 and the field-effect mobility of ∼1 cm2/Vs were obtained.

Impact of interface controlling layer of Al2O3 for improving the retention behaviors of In–Ga–Zn oxide-based ferroelectric memory transistor

We characterized the nonvolatile memory thin-film transistors, which was composed of an amorphous indium-gallium-zinc oxide (α-IGZO) active channel and a ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator, and investigated the impact of an interface controlling layer. Excellent device performances, such as the field-effect mobility of 60.9 cm2 V−1 s−1, the subthreshold swing of 120 mV/dec, and the memory window of 6.4 V at ±12 V programming, were confirmed for the device without any interface layer. However, the memory retention time was very short. The retention behaviors could be dramatically improved when 4 nm thick Al2O3 layer was introduced between the P(VDF-TrFE) and α-IGZO.

Low-Voltage Operation of Ferroelectric Gate Thin Film Transistors Using Indium Gallium Zinc Oxide-Channel and Ferroelectric Polymer Poly(vinylidene fluoride–trifluoroethylene)

We demonstrate ferroelectric gate thin-film transistors (Fe-TFTs) with very thin (60, 110 nm) ferroelectric polymer poly(vinylidene fluoride?trifluoroethylene) [P(VDF?TrFE)] and amorphous indium gallium zinc oxide (a-IGZO) as the channel layer on a glass substrate. First, we confirm the basic ferroelectric properties of the 60- and 110-nm-thick-P(VDF?TrFE) films. Next, we fabricate Fe-TFTs with the Al/P(VDF?TrFE) (60 and 110 nm)/a-IGZO (10 nm) top-gate structure. Excellent electrical characteristics are demonstrated and nonvolatile memory function is confirmed with memory windows of 2.3 and 4.3 V, when the thicknesses of P(VDF?TrFE) were 60 and 110 nm, respectively. In particular, the Fe-TFTs with 60-nm-thick-P(VDF?TrFE) film were operated under 8 V.

Experimental demonstration of a ferroelectric FET using paper substrate

A ferroelectric field-effect transistor on a cellulose paper for nonvolatile memory application is fabricated by a low-cost solutionbased-only fabrication process. A ferroelectric material, poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)), is used to obtain a wide threshold voltage (VTH) window of 920V for the transistor on paper. An on/off current ratio of 9102 is also obtained with a semiconducting channel material, Poly(3-hexylthiophene) (P3HT).

FABRICATION AND ELECTRICAL PROPERTIES OF Au/PVDF-TrFE/LaZrOx/Si(100) STRUCTURE

Metal-ferroelectric-insulator-semiconductor structure capacitors with a polyvinylidene fluoride trifluoroethylene (75/25) (PVDF-TrFE) ferroelectric and a lanthanum zirconium oxide (LaZrOx) insulator layers were fabricated on a p-type Si(100) substrate in this work. The thin films were prepared using the spin-coating method. The LaZrOx thin films were crystallized at 750°C for 30 min in an O2 ambient. Negligible hysteresis was observed from the C–V (capacitance-voltage) characteristic of the LaZrOx/Si structure. The equivalent oxide thickness (EOT) was about 8.2 nm. Then the PVDF-TrFE film was spin-coated on the LaZrOx/Si structure. To crystallize the PVDF-TrFE, the structure was annealed at 165°C for 30 min. The memory window width in the C–V curve of the Au/PVDF-TrFE/LaZrOx/Si structure was about 4 V for a voltage sweep of ±5 V, and the leakage current density was about 10-8A/cm2 at 35 kV/cm for a 100-nm-thick film.

Fabrication and Characterization of MFIS-FET Using Au/BLT/LZO/Si Structures

We fabricated the n-channel metal-ferroelectric-insulator-semiconductor field-effect transistor (MFIS-FET) using an Au/(Bi,La) 4 Ti 3 O 12 /LaZrO x /Si(100) gate structure. We observed that the LaZrO x thin film had the equivalent oxide thickness value of around 8.7 nm. The 420-nm-thick (Bi,La) 4 Ti 3 O 12 film on a LaZrO x /Si structure, showed a good ferroelectric property and had the width of the memory window of 1.2 V for a bias voltage sweeping of ± 7 V. The drain current-gate voltage (I D -V G ) of an Au/(Bi,La) 4 Ti 3 O 12/ LaZrO x /Si(100) MFIS-FET showed threshold voltage shift (memory window width) owing to the ferroelectric (Bi,La) 4 Ti 3 O 12 film. The drain current-drain voltage (I D -V D ) characteristic curves exhibit typical n-channel field-effect transistor current-voltage characteristic. However, relatively large leakage current observed in the I D –V G and the I D –V D characteristic curves, might be caused by the high density of pores in the BLT film.