Byung-Eun Park

Lanthanum-substituted bismuth titanate for use in non-volatile memories

Non-volatile memory devices are so named because they retain information when power is interrupted; thus they are important computer components. In this context, there has been considerable recent interest in developing non-volatile memories that use ferroelectric thin films—‘ferroelectric random access memories’, or FRAMs—in which information is stored in the polarization state of the ferroelectric material. To realize a practical FRAM, the thin films should satisfy the following criteria: compatibility with existing dynamic random access memory technologies, large remnant polarization (Pr) and reliable polarization-cycling characteristics. Early work focused on lead zirconate titanate (PZT) but, when films of this material were grown on metal electrodes, they generally suffered from a reduction of Pr (‘fatigue’) with polarity switching. Strontium bismuth tantalate (SBT) and related oxides have been proposed to overcome the fatigue problem, but such materials have other shortcomings, such as a high deposition temperature. Here we show that lanthanum-substituted bismuth titanate thin films provide a promising alternative for FRAM applications. The films are fatigue-free on metal electrodes, they can be deposited at temperatures of ∼650 °C and their values of Pr are larger than those of the SBT films.

BUILT-IN VOLTAGES AND ASYMMETRIC POLARIZATION SWITCHING IN PB(ZR, TI)O3 THIN FILM CAPACITORS

Asymmetric polarization switching of Pb(Zr,Ti)O3 (PZT) thin films with different electrode configuration has been studied in (La,Sr)CoO3/Pb(Zr,Ti)O3/(La,Sr)CoO3 (LSCO) heterostructures in which the conducting oxide (La,Sr)CoO3 and/or LaCoO3 (LCO) have been used as an electrode. Polarization-voltage (P-V) hysteresis loop of LSCO/PZT/LSCO was symmetric. However, LCO/PZT/LSCO showed a largely asymmetric P-V hysteresis loop and large relaxation of the remanent polarization at the negatively poled state, eventually leading to an imprint failure. On the other hand, LSCO/PZT/LCO exhibited large relaxation of the positively poled state. The asymmetric behavior of the polarized states implies the presence of an internal electric field inside the PZT layer. It is suggested that the internal electric field is caused by built-in voltages at LCO/PZT and LSCO/PZT interfaces. The built-in voltages at LCO/PZT and LSCO/PZT interfaces were 0.6 V and 0.12 V, respectively.

Thirty-Day-Long Data Retention in Ferroelectric-Gate Field-Effect Transistors with HfO2 Buffer Layers

Metal–ferroelectric–insulator–semiconductor (MFIS) diodes and p-channel MFIS field-effect transistors (FETs) were fabricated and their electrical properties were characterized. These MFIS structures were formed using HfO2 as an insulating buffer layer, and SrBi2Ta2O9 (SBT) and (Bi,La)4Ti3O12 (BLT) as ferroelectric films. HfO2 buffer layers of about 8 nm physical thickness were deposited by ultrahigh-vacuum (UHV) electron-beam evaporation, then ferroelectric films of about 400 nm thickness were deposited by sol–gel spin coating. The fabricated p-channel MFIS-FETs with the SBT/HfO2 gate structure exhibited a drain current on/off ratio larger than 103 even after 30 days had elapsed. It was also found that the degradation of ferroelectricity was not pronounced even after applying 2.2×1011 bipolar pulses.

Different fatigue behaviors of SrBi2Ta2O9 and Bi3TiTaO9 films: Role of perovskite layers

To investigate the role of the perovskite layers on fatigue behaviors, SrBi2Ta2O9(SBT) and Bi3TiTaO9 (BTT) films were prepared by pulsed laser deposition using 15% Bi-excess bulk targets. The SBT and the BTT films grown at the similar deposition conditions showed similar growth behaviors, electrical properties, and retention characteristics. However, these films showed very different fatigue behaviors. The difference should come from the oxygen stability in the perovskite layer. Our work demonstrates that oxygen stability of the perovskite layers, as well as the self-regulating adjustment of the Bi2O2 layers, should be considered in the search for new candidate materials for nonvolatile ferroelectric memory devices.

Effects of interface charges on imprint of epitaxial Bi4Ti3O12 thin films

Using La0.5Sr0.5CoO3 (LSCO) or Pt film as a bottom electrode layer, epitaxial Bi4Ti3O12 (BTO) thin films were grown on MgO(001) substrates by pulsed laser deposition. A symmetric Pt/BTO/Pt capacitor structure shows a surprisingly large asymmetric polarization switching behavior, but a Pt/BTO/LSCO structure has a nearly symmetric P–V hysteresis. The strong asymmetric behavior in the Pt/BTO/Pt was attributed to positive charges resulting from interdiffusion at the bottom BTO/Pt interface. P–V hysteresis studies using numerous top electrode materials and Auger electron spectroscopy depth profile measurement also support formation of interfacial charges. Imprint pulse test shows that such an imprint failure cannot be recovered by applying a dc bias field.

Improvement of Electric and Optical Properties of a Reflective Electronic Display by Particle-Moving Method

We propose a new particle-insertion method for a reflective display based on the structure of a quick response-liquid powder display (QR-LPD). To compare this method with the reported simple loading method, two panels are fabricated in the same panel condition of which the width of ribs is 30 μm, the cell size is 220 μm 220 μm, the cell gap is 116-120 μm, the m value of the black particles is μC/g and that for the white particles is μC/g. This method excludes the non-moving particles, inserting only mobile particles into a substrate by using electric fields so that a panel fabricated by the particle-moving method can drive most of the particles in a cell. Also, most of the particles move at the threshold voltage of 40 V with enhanced reflectivity.

Color Realization of Reflective Electronic Display Using Particle-Moving Method

We propose a color realization method of a reflective display based on quick response-liquid powder display (QR-LPD). We use the particle-moving method in order to address the color particles cyan, magenta, yellow, and black (CMYK) into their respective cells. We fabricated a color addressed reflective display panel using indium-tin-oxide (ITO) glass with a rib width of 15 μm, a cell size of 300 μm × 300 μm, an average particle diameter of 8 μm, and a particle charge to mass ratio (q/m) from +8.5 μC/g to -4 μC/g. Most particles are inserted into their cells on the upper substrate, with non-movable particles removed in a previous step. The fabricated color panel shows a well-addressed CMYK array in microscopic photographs. An additional color display is fabricated using line-by-line addressing in order to facilitate the addressing process.

CHARACTERIZATION OF METAL-FERROELECTRIC-SEMICONDUCTOR STRUCTURE USING FERROELECTRIC POLYMER POLYVINYLIDENE FLUORIDE-TRIFLUOROETHYLENE (PVDF-TrFE) (51/49)

ABSTRACT In this work, we fabricated metal-ferroelectric-semiconductor (MFS) diodes with polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE) (51/49) thin films for application to one transistor-type (1T-type) ferroelectric random access memories (FeRAMs). The thin films, with various thicknesses, were prepared on a silicon substrate by using a spin-coating method. The β-phase crystallinity and the grain size of the PVDF-TrFE increased as the film-thickness increased. Typical ferroelectric hysteresis loops were obtained from the capacitance-voltage (C-V) curves. These loops might be considered to be due to the ferroelectric nature of the PVDF-TrFE films. The values of the memory window width for 50-nm-, 150-nm-, and 350-nm-thick PVDF-TrFE films were about 1.4, 2.0, and 3.5 V for a bias sweeping from −5 V to 5 V, respectively. The values of the leakage current density, at a sweeping range of ± 5 V, were about 2.7 × 10−5 A/cm2, 1.1 × 10−5 A/cm2, and 5.6× 10−6 A/cm2 for 50-nm-, 150-nm-, and 350-nm-thick films, respectively. These results are useful and promising for realizing 1T-type FeRAMs operating at a low voltage.

FABRICATION AND CHARACTERIZATION OF MFIS-FET USING Bi3.25La0.75Ti3O12/ZrO2/Si STRUCTURE

ABSTRACT A metal-ferroelectric-insulator-semiconductor structure (MFIS) has been fabricated by ZrO2and Bi3.25La0.75Ti3O12 as the buffer layer and ferroelectric film in forming MFIS diodes on Si(100) substrates, respectively. ZrO2 films were prepared by a sol-gel method. Then, they were carried out dry O2 annealing in a rapid thermal annealing (RTA) furnace at 700°C for 10 min. On the ZrO2/Si structures, Bi3.25La0.75Ti3O12 films were deposited by sol-gel method and they crystallized rapid thermal annealing in O2 atmosphere at 750°C for 30 min. They were characterized by X-ray diffraction analysis (XRD) and atomic force microscopy (AFM). The memory window width in capacitance-voltage(C-V) curve of the Au/BLT/ZrO2/Si diode was about 1.0 V for a voltage sweep of ± 4 V. Base on these results, we fabricated the MFIS-FET structure. The memory window width in drain current–gate voltage (ID–VG) curve of the MFIS-FET was about 0.7 V.

Comparative Study on Metal–Ferroelectric–Insulator–Semiconductor Diodes Composed of Poly(vinyliden fluoride-trifluoroethylene) and Poly(methyl metacrylate)-Blended Poly(vinyliden fluoride-trifluoroethylene)

Ferroelectric poly(vinyliden fluoride-trifluoroethylene) [P(VDF-TrFE)] and poly(methyl metacrylate) (PMMA)-blended P(VDF-TrFE) thin films were deposited by spin coating on Pt/TiO2/SiO2/Si and SiO2/Si structures, and their characteristics were investigated by forming metal–ferroelectric–metal (MFM) capacitors and metal–ferroelectric–insulator–semiconductor (MFIS) diodes. It was found that the data retention characteristics of MFIS diodes were significantly improved by blending PMMA and P(VDF-TrFE) and by optimizing the insulating buffer layer thickness. Under the present conditions, the longest data retention time of 6 h was obtained using a 1.5-nm-thick SiO2 buffer layer on Si.