Gyungseon Seol
Seoul National University
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Featured researches published by Gyungseon Seol.
compound semiconductor integrated circuit symposium | 2006
Kyoungwoon Kim; Wooyeol Choi; Sung-Won Kim; Gyungseon Seol; Kwang-Seok Seo; Youngwoo Kwon
In this work, the authors demonstrate a compact 77GHz single-chip transceiver for an automotive radar system. The transceiver consists of a low noise amplifier, mixer, doubler and power amplifier. The MMIC chip set is fabricated using a 120nm-gate-length In0.4AlAs/In0.35GaAs mHEMT. The low noise amplifier demonstrated a small signal gain of 19dB at 77GHz. The resistive mixer achieved a -11dB conversion gain. The doubler achieved 0.4dBm output power, a -5.6dB conversion gain and a difference of 18.4dBc between the 77GHz output and the fundamental output. The power amplifier demonstrated a small signal gain of 21.4dB at 77GHz with 12.3dBm output power. The single-chip transceiver demonstrated 9.3dBm output power at the transmitter and a 5dB conversion gain at the receiver
Japanese Journal of Applied Physics | 2007
Sung-Won Kim; Kyoungchul Jang; Gyungseon Seol; Jin-Cherl Her; Kwang-Seok Seo
In0.4AlAs/In0.35GaAs metamorphic high-electron-mobility transistors (MHEMTs) have been successfully fabricated. In order to reduce the surface effects on the barrier layer, Si3N4 layer passivation by remote plasma-enhanced chemical vapor deposition (PECVD) is utilized, which might suppress the surface trap density in side-recessed region and reduce the parasitic resistance. The device simulation was performed to derive the effects of surface trap in the side-recessed region. As the surface trap density decreases, ID.max increases because of the stabilization of the surface states in the side-recessed region. This result indicates that the increases of gm.max and ID.max are related with both the reduction of parasitic resistance and the gate-sinking effect. The fabricated 100 nm MHEMTs with the passivated of Si3N4 layer exhibited excellent characteristics such as a maximum extrinsic gm.max of 740 mS/mm and a cut off frequency ( fT) of 210 GHz.
Japanese Journal of Applied Physics | 2006
Seong-Jin Yeon; Hyungtae Kim; Jongwon Lee; Gyungseon Seol; Kwang-Seok Seo
InAlAs/InGaAs high electron mobility transistors (HEMTs) have been a great contribution to the research and development of high-speed integrated circuits, owing to their high electron mobilities, high saturation velocities, and high sheet electron densities. In integrated circuits using a HEMT as active device, the gate recess process has considerable influence on the yield and uniformity. The wet recess of a 0.1 µm gate footprint has difficulty achieving a high yield greater than 98% due to a nonuniform reaction between the etchant and the semiconductor. A uniform initial reaction between the InGaAs cap layer and the wet etchant mainly determines the yield and uniformity. In this paper, we present an ultrasonically assisted recess method of promoting a uniform initial reaction in the recess process. This method enables us to achieve a high yield and a high uniformity in integrated circuits.
Japanese Journal of Applied Physics | 2007
Seong-Jin Yeon; Jongwon Lee; Gyungseon Seol; Kwang-Seok Seo
Gate length reduction technology was developed for pseudomorphic high-electron-mobility transistors (P-HEMTs) applicable to nano-HEMTs. This technology utilizes various reactions between plasmas and dielectrics. Using optimum conditions for reducing gate length through pattern transfer in dielectric etching, we fabricated HEMTs having a sub-30 nm gate length reduced from the initial gate length of 0.13 µm. A HEMT with this technology has merits of both fine length definition beyond the limit of an electron beam (e-beam) lithography system and overcoming the metal filling problem caused by a high aspect ratio. The fabricated devices have high DC and RF performance characteristics, a transconductance of 1.35 S/mm, a maximum saturated current of 800 mA/mm and a cutoff frequency fT of 450 GHz.
asia-pacific microwave conference | 2006
Jong-Wook Lee; Suk-Jin Kim; Gyungseon Seol; K.-S. Seo
This paper reports a high power 60 GHz push-push oscillator fabricated using 0.12 mum GaAs metamorphic high electron-mobility transistors (MHEMTs). The devices with a 0.12 mum gate-length exhibited good DC and RF characteristics such as a maximum drain current of 700 mA/mm, a peak gm of 660 mS/mm, an fT of 170 GHz, and an fMAX of more than 300 GHz. By combining two sub-oscillators having 6 x 50 mum peripheries MHEMT, the push-push oscillator achieved 5.8 dBm of output power at 59.9 GHz with good fundamental suppression. This is the first monolithic push-push oscillator in 60 GHz band fabricated using MHEMT technology, and demonstrates a potential of MHEMT for cost effective millimeter wave commercial applications.
european microwave integrated circuits conference | 2006
Sung-Won Kim; Gyungseon Seol; Jin-churl Her; Kyung-Chul Jang; Kwang-Seok Seo
We have successfully demonstrated the novel HSQ based T-gate process to transfer the negative nanoscale patterns to positive patterns. This process is based on electron beam (EB) lithography, O2 plasma and BOE solution etching. Because O2 plasma etching has the high selectivity between HSQ and ZEP, HSQ patterns were exposed over the ZEP layer without any loss of pattern dimension. HSQ was then selectively etched by BOE solution. Therefore it is very simple and reproducible process in achieving nanoscale pattern of positive tone and could be useful for the fabrication of nanoscale T-gate HEMTs. The fabricated 40 nm In0.7GaAs HEMTs with the novel HSQ based T-gate process exhibit an extrinsic transconductance gm of 1.4 S/mm and a cut-off frequency fT of 370 GHz
european microwave integrated circuits conference | 2006
Jin-Cherl Her; Sung-Won Kim; Kyung-Chul Jang; Gyungseon Seol; Min-Koo Han; Jae-Eung Oh; Kwang-Seok Seo
Using the post-gate-annealing, the SiNx passivation and the post-passivation-annealing, the gate characteristics of 0.4 mum Al 0.26GaN-GaN HEMT on Si were successfully improved. With SiNx passivation using remote-plasma enhanced chemical vapor deposition, the current collapse was effectively suppressed. And it was found that annealing after passivation can improve the gate characteristics without serious change of the pulsed IV characteristics of the devices. As a result, maximum extrinsic transconductance, IDSS and pulsed drain-source current are increased by 12 %, 32 % and 31 %, respectively. And the gate-drain breakdown voltage was increased from 23 V to 80 V
The Japan Society of Applied Physics | 2006
Kyoungchul Jang; Gyungseon Seol; Sung-Won Kim; Jin-Cherl Her; Jae-Hak Lee; Kwang-Seok Seo
The Japan Society of Applied Physics | 2006
Seong-Jin Yeon; Jongwon Lee; Gyungseon Seol; Kwang-Seok Seo
Archive | 2006
Kyoungwoon Kim; Wooyeol Choi; Sung-Won Kim; Gyungseon Seol; Kwang-Seok Seo; Youngwoo Kwon