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Dive into the research topics where H. C. Tseng is active.

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Featured researches published by H. C. Tseng.


IEICE Transactions on Electronics | 2007

Improved design of thermal-via structures and circuit parameters for advanced collector-up HBTs as miniature high-power amplifiers

H. C. Tseng; Pei-Hsuan Lee; Jung Hua Chou

An improved methodology, based on the genetic algorithm, is developed to design thermal-via structures and circuit parameters of advanced InGaP and InGaAs collector-up heterojunction bipolar transistors (C-up HBTs), which are promising miniature high-power amplifiers (HPAs) in cellular communication systems. Excellent simulated and measured results demonstrate the usefulness of this technique.


international conference on electronic packaging technology | 2007

Thermal Performance Analysis for Packaging Configuration Design of Multifinger GaInP Collector-Up HBTs as Small High-Power Amplifiers

H. C. Tseng; Pei-Hsuan Lee; Jung Hua Chou

A finite-element modeling (FEM) methodology is utilized to investigate the thermal performance of GaInP collector-up heterojunction bipolar transistors (C-up HBTs) with thermal-via packaging configurations. The thermal interaction between HBT fingers has been examined based on the temperature distribution phenomena in multifinger C-up HBTs. The results obtained from the C-up HBT with a three-finger structure indicate that the thickness of thermal-via configuration can be further reduced by 33% without deteriorating the thermal performance. From tins analysis, it is demonstrated that thinning the thermal-via packaging design should be an effective approach for miniaturization of C-up HBTs as high-power amplifiers in cellular-phone communication systems.


international microsystems, packaging, assembly and circuits technology conference | 2010

FOMs extraction for quantum-well lasers and low-noise amplifiers with a modified genetic algorithm technique

J. K. Li; H. C. Tseng

Semiconductor market trends indicate the rapid development of new integrated systems containing both optoelectronic and wireless-communication functionalities [1]. For projection-display devices and high-density optical disks in new integrated systems, the green light can be generated from solid-state lasers, in combination with second-harmonic generation (SHG) crystal, owing to their distinct features such as low noise, high-frequency-modulation capability, compactness, and low-power consumption [2]. The 1060 nm InGaAs quantum-well (QW) laser diode is one of applicable active components for this application [3]. However, the internal loss (αj), the internal quantum efficiency (ηj, and the transparency current density (Jth), which are fig-ures-of-merit (FoMs) for the QW laser under high-power-laser operation, are needed to be further improved. In the other respect, the low-noise amplifier (LNA), for wireless-communication functionalities in new integrated systems, is exploited to overcome the noise produced in subsequent stages by amplifying incoming radio-frequency (RF) signals, while introducing minimum amount of noise [4]. Nowadays, the SiGe LNA employing HBTs has been a main contender among the Si-based IC industry due to their advantages of higher cutoff frequency, lower noise, and better power performance. In general, the performance of SiGe LNAs relies on the geometrical-scaling issue, e.g., the emitter-length scaling [5]. For the HBT-based LNA design, attention should be devoted to optimizing FoMs such as the minimum noise figure (NFmm) and the associated available gain (GA, assoc) [6].


international microsystems, packaging, assembly and circuits technology conference | 2010

Genetic optimization of multi-finger high-power amplifiers with miniature packaging structures

T. W. Chen; H. C. Tseng

As proposed in a classical paper [1], an inverted transistor design with a smaller collector on top and a larger emitter at the bottom is defined as the collector-up hetero-junction bipolar transistor (C-up HBT). Compared to the traditional emitter-up (E-up) HBT, the C-up HBT exhibits reduced base-collector junction capacitance, which is nearly one-third that of the E-up HBT, hence the C-up HBT is expected to show better microwave performance that makes it possible to be used as the active component in the power amplifier (PA) [2]. In an advanced wireless communication system, small HBT-based PAs are demanded to promote the development of the system-on-chip (SOC) or system-in-package (SIP) technology. The miniaturization of PAs depends primarily on the thermal management of HBTs. Previous researches suggested the thermal-via configuration (TVC) made up of plated heat sink (PHS) and conductive epoxy underneath the C-up HBT fingers to dissipate heat [3]. The innovative configurations lead to low thermal resistances, and hence the temperature within transistor fingers is lowered. In the other respect, when circuit designers laying out the current-mode logic gate using E-up HBTs, each transistor has to be isolated from each other, and the emitters of the switching pair are connected through the metal layer [4]. Replaced E-up transistors by C-up transistors, the emitters of the switching pair are merged in the buried layer of the substrate. The transistors do not have to be fully isolated from each other, and metal interconnection is minimized.


international conference on electronic packaging technology | 2009

An in-depth numerical investigation into packaging design of multi-finger GaInP/GaAs collector-up HBTs

H. C. Tseng; J. Y. Chen

A novel finite-element modeling approach is developed to design thermal-via packaging configurations of collector-up heterojunction bipolar transistors (C-up HBTs) in high-power amplifiers (HPAs). The thermal interaction between HBT fingers has been examined based on the temperature distribution phenomena in multifinger C-up HBTs. The results reveal that the overall compactness of thermal-via configuration can be further improved more than 33%.


international conference on electron devices and solid-state circuits | 2009

Characterization of quantum-well and super-lattice lasers

H. C. Tseng; A. H. Wu; Cheng-Tien Wan; Yan-Kuin Su; Chenming Hu; S. Tsau

In this paper, we made an in-depth study on the fabrication of low-pressure MOCVD-grown 1055-1064 nm multi-quantum-well and super-lattice laser diodes, which can be used for green-light generation combined with second-harmonic generation crystal. Due to the simplicity of the configuration and high reliability, large merits in terms of size, cost, and power consumption would arise. Furthermore, direct modulation is possible in the laser diodes, which would lead to a highly compact pulsed laser source.


Journal of Electronic Packaging | 2009

Novel Design of Thermal-Via Configurations for Collector-Up HBTs

Pei-Hsuan Lee; H. C. Tseng; Jung Hua Chou

We devise a finite-element model to analyze the thermal performance of collector-up (C-up) heterojunction bipolar transistors (HBTs) with a thermal-via configuration. A demonstration on the GaInP/GaAs C-up HBT is presented in this Brief, and the novelty of this work is that both 2D and 3D temperature-distribution analyses are performed. The 2D results indicate that the original thermal-via configuration can be reduced by 29%. Furthermore, the results show that the maximum temperature within the collector calculated from 3D analysis is lower than that from the 2D analysis. Based on the 3D analysis, it is revealed that the reported configuration can be reduced by 32%. Therefore, the C-up HBT with a compact thermal-via should be helpful for miniaturization of heat-dissipation packaging configurations within HBT-based high-power amplifiers.


international microsystems, packaging, assembly and circuits technology conference | 2008

A Miniature Heat-Dissipation Packaging Design for GaInP Collector-Up HBTs as High-Power Amplifiers in Cellular Phone Systems

H. C. Tseng; Pei-Hsuan Lee; Jung Hua Chou

A heat-dissipation packaging configuration of GaInP collector-up (C-up) heterojunction bipolar transistors (HBTs) has been designed and evaluated systematically. 2-D and 3-D finite-element modeling (FEM) approaches are built up to simulate the actual devices and to analyze the temperature distribution behavior. The results show that the reported configuration can be further reduced by 42%. Therefore, thinning the thermal-via structure constructed in GaInP collector-up HBTs should be useful for miniaturization of high-power amplifier (HPA) designs, and the developed FEM method can be very effective for optimizing HBT-based HPAs in future cellular phone systems.


international conference on indium phosphide and related materials | 2007

A Compact Thermal-Via Packaging Design of GaInP/GaAs Collector-Up HBTs in Small High-Power Amplifiers

Pei-Hsuan Lee; Jung Hua Chou; H. C. Tseng

We model the thermal performance of the large thermal via which under the collector-up heterojunction bipolar transistor (HBT) by using a finite element method. A compact thermal-via packaging of GaInP/GaAs collector-up HBTs has been designed and calculated. The results indicate that the configuration can be further reduced by 29% to meet the requirement of small high-power amplifiers for cellular-phone communication systems.


international microsystems, packaging, assembly and circuits technology conference | 2011

Improving thermal management of multi-finger InGaP collector-up HBTs with a highly compact heat-spreading structure by GA

H. C. Tseng; Wen-Young Li; Tze-Wei Chen

A variety of complex configurations have been attempted to enhance the thermal stability of modern heterojunction bipolar transistors (HBTs). Existing structures for improving thermal management of power HBTs, nevertheless, are not small enough to realize miniaturized power amplifiers in high-efficiency cellular phones. A highly compact heat-spreading structure (HSS) simulated by the genetic algorithm (GA) is proposed, and the demonstration on multi-finger InGaP/GaAs collector-up HBTs, which show noticeable power performance, is presented. Comparatively, the improved results indicate that the thermal resistance can be substantially decreased by 50%, and a power-added efficiency (PAE) more than 55% is achieved from this novel design

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Jung Hua Chou

National Cheng Kung University

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Pei-Hsuan Lee

National Cheng Kung University

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Yan-Kuin Su

National Cheng Kung University

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Cheng-Tien Wan

National Cheng Kung University

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