H. Loevenich

Flexible data acquisition system for experiments at COSY

For the KFA Julich cooler synchrotron COSY a general data acquisition system was developed. Its architecture is based on available standards (VME, FASTBUS, CAMAC, VICbus) and UNIX workstations forming a distributed processor system. Based on this hardware a flexible and modular data acquisition software was designed allowing the configuration of various experiment arrangements. The software design for run control is arranged according to a client server connectivity model as well as to an object oriented structure. It is logically based on MAP/MMS (ISO9506), a powerful application layer protocol for distributed automation systems in industry. In our application servers are implemented on the mProcessor controller boards at the frontend. On the workstation side the experiment control client consists of dedicated processes with access to the configurable experiment data base. The user interface is realized by OSF/Motif. Established software standards for online data analysis high energy physics are employed. We discuss the most important design decisions mainly focusing on the software aspects. >

The new DAQ system for WASA at COSY

For the operation of the WASA (Wide Angle Shower Apparatus) detector system at the Cooler Synchrotron COSY in Forschungszentrum Julich (FZJ) a new DAQ system has been developed, which conforms to the third generation of the DAQ systems at COSY. This comprises new readout electronics based on an optimized parallel bus with LVDS technology and FPGA-controlled event and buffer management. The new DAQ system has been successfully commissioned in autumn 2006. Further developments aiming at performance optimizations are in progress. The implementation status is presented and performance issues are discussed.

COSY data acquisition system for physical experiments

A three-level data processing and acquisition system is being developed. Signals from various detector arrangements are digitized and preprocessed by CAMAC, FASTBUS, and VME modules. A multiprocessor system based on VMEbus is used for event building, data recording, and buffered data transfer to the host computer. All crates are connected by parallel VICbus. For this, an intelligent CAMAC rate controller with VICbus is under development. Microcomputer-based VME modules are equipped with CPUs of the 680X0 family, working under the OS-9 real-time operating system. The data acquisition system is mainly based on commercially available modules. >

Performance Issues of the New DAQ System for WASA at COSY

For the operation of the WASA (Wide Angle Shower Apparatus) detector system at the Cooler Synchrotron COSY in Forschungszentrum Julich (FZJ) a new DAQ system has been developed, which conforms to the third generation of the DAQ systems at COSY. This comprises new readout electronics based on an optimized parallel bus with LVDS technology and FPGA-controlled event and buffer management. The new DAQ system has been successfully commissioned in autumn 2006. Further developments aiming at performance optimizations are in progress. The implementation status is presented and performance issues are discussed.

Intelligent CAMAC crate controller with CC-A2 functionality and VICbus interface

For nuclear physics experiments at the Julich Cooler Synchrotron COSY, a data acquisition system is under development. With this background, and in order to enhance existing CAMAC systems, an intelligent CAMAC crate controller with CC-A2 functionality was developed. The main enhancement is the replacement of the Branch Highway with a new standard of intercrate connection: the VICbus. The other highlights are the optional use of Motorola 68030 microprocessor as CAMAC list-processor and optimization of CAMAC block transfers, optional Ethernet or Cheapernet connection.<<ETX>>

ADC-Based Real-Time Signal Processing for the PANDA Straw Tube Tracker

The PANDA (AntiProton Annihilations at Darmstadt) experiment is being built at the new Facility for Antiproton and Ion Research (FAIR) in Darmstadt, Germany. PANDA will measure antiproton-proton annihilation reactions in the charm quark mass range to investigate the nature of the strong interaction. This particle physics experiment will run at very high reaction rates of 10-20 MHz. Our work is related to an ADC (analog-to-digital converter) based data acquisition system for the PANDA Straw Tube Tracker (STT). The STT will be able to deliver data rates up to 20 GByte/s through over 4600 signal channels and could require major efforts for the hardware implementation as well as high offline processing power. Test beam studies were carried out in order to specify a proper system architecture with feasible hardware and to reduce output data stream to a level suitable for offline processing. We analyze the straw tube response to both the proton beam and 55Fe irradiation. Furthermore, we present real-time processing using the neighboring straw information and introduce the technique to reconstruct the tracks.

Investigation of an ADC based signal processing and design of an ATCA data acquisition system unit for the Straw Tube Tracker at PANDA

The work concerns with ADC based data acquisition system for PANDA (AntiProton Annihilations at Darmstadt) Straw Tube Tracker (STT). Test-beam studies in terms of parameters and system architecture definition were carried out. We present on-FPGA real time processing dependent on neighboring straw data and introduce track reconstruction technique.

A new readout-controller for COSY-DAQ based on the Virtex-II Pro /spl Gt/system on a chip/spl Lt/-FPGA

For the DAQ in hadron physics experiments at the 3.7 GeV storage ring COSY in FZ Julich a new generation of readout electronics has been implemented. High performance and cost efficiency is achieved by the definition of an optimized parallel backplane bus in the frontend, based on LVDS technology with 80 Mbytes/s nominal throughput. For the readout of the digitizing modules a systemcontroller module has been developed which operates as master of the backplane bus and transfers the acquired data to the upper layers of the DAQ system via optical links. The systemcontroller is based on the Virtex-II Pro Gtsystem on a chipLt-FPGA running embedded Linux on its internal PowerPC CPU. The framework of the third generation of DAQ at COSY is introduced and the architecture of the systemcontroller is described. Measurement-results of the communication link performance are presented