H.W. van Zeijl

Influence of Cross-linkers on the Cohesive and Adhesive Self-Healing Ability of Polysulfide-Based Thermosets

Synthetic systems with intrinsic self-repairing or self-healing abilities have emerged during the past decade. In this work, the influence of the cross-linker and chain rigidity on the healing ability of thermoset rubbers containing disulfide bonds have been investigated. The produced materials exhibit adhesive and cohesive self-healing properties. The recovery of these two functionalities upon the thermally triggered healing events has shown to be highly dependent on the network cross-link density and chain rigidity. As a result, depending on the rubber thermoset intrinsic physical properties, the thermal mending leading to full cohesive recovery can be achieved in 20-300 min at a modest healing temperature of 65 °C. The adhesive strength ranges from 0.2 to 0.5 MPa and is fully recovered even after multiple failure events.

A back-wafer contacted silicon-on-glass integrated bipolar process. Part I. The conflict electrical versus thermal isolation

A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is performed by gluing and subsequent removal of the bulk silicon to a buried oxide layer. Low-ohmic collector contacts are processed on the back-wafer by implantation and dopant activation by excimer laser annealing. The improved electrical isolation with reduced collector-base capacitance, collector resistance and substrate capacitance, also provide an extremely good thermal isolation. The devices are electrothermally characterized in relationship to different heat-spreader designs by electrical measurement and nematic liquid crystal imaging. Accurate values of the temperature at thermal breakdown and thermal resistance are extracted from current-controlled Gummel plot measurements.

Modelling and fabrication of Geiger mode avalanche photodiodes

As a first assessment for the fabrication of Geiger mode avalanche photodiode arrays, single pixel devices have been made. A CMOS compatible technology is used to allow the future integration of pixels in an array with readout electronics. A model for afterpulsing is presented that relates the afterpulsing probability to the concentration and capture cross section of the traps in the depletion layer. The bias voltage and temperature dependence of the dark count rate is explained by a trap assisted tunneling model. Measured results on fabricated devices are compared with theory.

DIMES-01, a baseline BIFET process for smart sensor experimentation

Abstract The DIMES-01 BIFET baseline process is presented. The process and devices are described in relationship to their application in integrated silicon sensor research and development. In particular, the possibilities of introducing special sensor process modules and steps are treated.

A silicon avalanche photodiode for single optical photon counting in the Geiger mode

Abstract Avalanche photodiodes (APDs) can be used in the so-called Geiger mode to count single optical photons. In this mode the diode is biased above its breakdown voltage. The absorption of a single photon initiates avalanche breakdown, which can easily be detected. Prototypes of an area-efficient structure for Geiger-mode dedicated APDs have been designed, fabricated and tested. These structures have been created within the framework of a project to integrate arrays of these devices. The prototypes can be used for photon counting. They do, however, suffer from afterpulsing, which is caused by traps originating from damage caused by an implantation in the fabrication process.

Optimization of fully-implanted NPNs for high-frequency operation

With a very straightforward (low-cost) process flow as basis, fully-implanted washed-emitter-base (WEB) NPNs have been optimized for operation in the 10-30 GHz range. Above 20 GHz the best overall performance is achieved by heavy doping of the epi. A low-stress silicon rich nitride layer is proven effective as surface isolation before contact window dip-etch.

Fully back-end TSV process by Cu electro-less plating for 3D smart sensor systems

A fully back-end process for high-aspect ratio through-silicon vias (TSVs) for 3D smart sensor systems is developed. Atomic layer deposition of TiN provides a highly conformal barrier as well as a seed layer for metal plating. Cu electro-less plating on the chemically activated TiN surfaces is applied to uniformly fill the TSVs in a significantly shorter time (2 h for 300 μm deep and 20 μm wide TSVs) than with Cu bottom-up electroplating (>20 h). The process is CMOS compatible and can be performed after the last metalization step, making it a fully back-end process (VIA-last approach). Wafers containing metal interconnections on both sides are in fact used as demonstrator. Four-terminal 3D Kelvin structures are fabricated and characterized. An average resistance value of 650 mΩ is measured for 300 μm deep TSVs with an aspect ratio of 15. The crosstalk between adjacent TSVs is also measured by means of S-parameters characterization on dedicated RF test structures. The closest TSVs (75 μm) show a reciprocal crosstalk of less than −20 dB at 30 GHz.

Enhancing the Wettability of High Aspect-Ratio Through-Silicon Vias Lined With LPCVD Silicon Nitride or PE-ALD Titanium Nitride for Void-Free Bottom-Up Copper Electroplating

One of the critical steps toward producing void-free and uniform bottom-up copper electroplating in high aspect-ratio (AR) through-silicon vias (TSVs) is the ability of the copper electrolyte to spontaneously flow through the entire depth of the via. This can be accomplished by reducing the concentration gradient of cupric ions from the via mouth to the via bottom by enhancing the wettability of the vias sidewalls. In this paper, we report on a new dry technique to enhance the hydrophilicity in high AR (~15) TSVs as one of the key solutions to face the mass transport limitation, low pressure chemical vapor deposition silicon nitride and atomic layer deposition titanium nitride of composition SiN0.95 and TiN11, respectively, are used as both barrier layers and wetting surfaces in these vias. Ammonia plasma immersion is used to treat silicon nitride. X-ray photoelectron spectroscopy shows both a partial oxidation and grafting of hydrophilic components. Alternatively, a rapid flood ultraviolet exposure step in order to photocatalytically activate the surface and induce a partially oxidized titanium nitride is used to create a highly wettable interface with a contact angle close to zero. These wettability enhancement steps were incorporated in a TSV process to produce 3-D cross-Kelvin structures using bottom-up copper electroplating. The vias lined with silicon nitride and titanium nitride exhibited a low average resistance of 25 mΩ and 50 mΩ, respectively, making them very suitable for radio-frequency signal transmission. This all-dry technology to achieve superhydrophilic barrier layers can be employed in both high and low thermal budget processing, thus enabling via-last or via-first flowchart schemes for advanced 3-D interconnects.

Stretchable array of ISFET devices for applications in biomedical imagers

Technologies for rendering of 2D arrays of ISFET (Ion Sensitive FET) devices into stretchable and biocompatible systems with applications in biomedical imagers are presented. Rigid silicon segments containing the ISFET devices are mechanically and electrically connected through flexible parylene beams with embedded metal tracks for signal and power distribution. Key in this technology is the use of biocompatible parylene polymer both as a structural element for the stretchable-interconnect beams, as well as for the overall system encapsulation. Local laser ablation of the parylene coating is successfully applied on the fabricated ISFET devices to expose the ion-sensitive ISFET gates resulting in a leakage current in the nA range. The ISFET devices are fabricated using a custom 2 µm CMOS process. ISFETS are processed successfully side by side with CMOS devices to verify their compatibility.

Multi-LED package design, fabrication and thermal analysis

An ultra-thin multi-LED package is designed, manufactured and its thermal performance is characterized. The objective of this study is to develop an efficient thermal modelling approach for this system which can be used for optimization of the thermal-performance of future ultra-thin designs. A high-resolution thermal imaging camera and thermocouples were used to measure the temperature distribution of the multi-LED package and the LED-die temperature for different operating powers. Finally, we compare the thermal measurements with the finite element simulation results. It is concluded that the modelling approach can assist in the thermal optimization of future multi-LED package designs.