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Publication
Featured researches published by Haihua Chen.
international conference on solid-state and integrated circuits technology | 2008
Yi Huang; Shanshan Du; Haiyang Zhang; Haihua Chen; Qiuhua Han; Shih-Mou Chang
This paper presents an overview of 65 nm poly gate fabrication challenges emerged during the device performance & yield enhancement on 300 mm wafer. The proposed solutions hinge on the improvement of some critical process parameters in 65 nm gate etch such as, critical dimension uniformity (CDU), through-pitch etch bias (TPEB), line width roughness (LWR) and poly gate profile. More than 7% yield enhancement and improved Vmin (the minimum voltage at which the addressed device function correctly) distribution have been obtained with improved CDU&TPEB.
Archive | 2010
Qiuhua Han; Haihua Chen; Shimou Zhang; Baodong Han
Archive | 2008
Yi Huang; Shanshan Du; Haihua Chen; Haiyang Zhang
Archive | 2008
Haiyang Zhang; Haihua Chen; Yi Huang; Qingtian Ma
Archive | 2008
Haiyang Zhang; Haihua Chen; Yi Huang
Archive | 2012
Haihua Chen; Yi Huang; Haiyang Zhang; Linlin Zhao
Archive | 2009
Haiyang Zhang; Haihua Chen; Yi Huang; Xiaobin Duan
Archive | 2011
Haihua Chen; Yi Huang; Haiyang Zhang
Archive | 2010
Haihua Chen; Qi-Yang He; Yi Huang; Haiyang Zhang
Archive | 2010
Haihua Chen; Yi Huang; Haiyang Zhang; Linlin Zhao
Collaboration
Dive into the Haihua Chen's collaboration.
