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Dive into the research topics where Hamed Nemati is active.

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Featured researches published by Hamed Nemati.


computer and communications security | 2013

Formal verification of information flow security for a simple arm-based separation kernel

Mads Dam; Roberto Guanciale; Narges Khakpour; Hamed Nemati; Oliver Schwarz

A separation kernel simulates a distributed environment using a single physical machine by executing partitions in isolation and appropriately controlling communication among them. We present a formal verification of information flow security for a simple separation kernel for ARMv7. Previous work on information flow kernel security leaves communication to be handled by model-external means, and cannot be used to draw conclusions when there is explicit interaction between partitions. We propose a different approach where communication between partitions is made explicit and the information flow is analyzed in the presence of such a channel. Limiting the kernel functionality as much as meaningfully possible, we accomplish a detailed analysis and verification of the system, proving its correctness at the level of the ARMv7 assembly. As a sanity check we show how the security condition is reduced to noninterference in the special case where no communication takes place. The verification is done in HOL4 taking the Cambridge model of ARM as basis, transferring verification tasks on the actual assembly code to an adaptation of the BAP binary analysis tool developed at CMU.


ieee symposium on security and privacy | 2016

Cache Storage Channels: Alias-Driven Attacks and Verified Countermeasures

Roberto Guanciale; Hamed Nemati; Christoph Baumann; Mads Dam

Caches pose a significant challenge to formal proofs of security for code executing on application processors, as the cache access pattern of security-critical services may leak secret information. This paper reveals a novel attack vector, exposing a low-noise cache storage channel that can be exploited by adapting well-known timing channel analysis techniques. The vector can also be used to attack various types of security-critical software such as hypervisors and application security monitors. The attack vector uses virtual aliases with mismatched memory attributes and self-modifying code to misconfigure the memory system, allowing an attacker to place incoherent copies of the same physical address into the caches and observe which addresses are stored in different levels of cache. We design and implement three different attacks using the new vector on trusted services and report on the discovery of an 128-bit key from an AES encryption service running in TrustZone on Raspberry Pi 2. Moreover, we subvert the integrity properties of an ARMv7 hypervisor that was formally verified against a cache-less model. We evaluate well-known countermeasures against the new attack vector and propose a verification methodology that allows to formally prove the effectiveness of defence mechanisms on the binary code of the trusted software.


workshop on trustworthy embedded devices | 2013

Machine code verification of a tiny ARM hypervisor

Mads Dam; Roberto Guanciale; Hamed Nemati

Hypervisors are low level execution platforms that provide isolated partitions on shared resources, allowing to design secure systems without using dedicated hardware devices. A key requirement of this kind of solution is the formal verification of the software trusted computing base, preferably at the binary level. We accomplish a detailed verification of an ARMv7 tiny hypervisor, proving its correctness at the machine code level. We present our verification strategy, which mixes the usage of the theorem prover HOL4, the computation of weakest preconditions, and the use of SMT solvers to largely automate the verification process. The automation relies on an integration of HOL4 with BAP, the Binary Analysis Platform developed at CMU. To enable the adoption of the BAP back-ends to compute weakest preconditions and control flow graphs, a HOL4-based tool was implemented that transforms ARMv7 assembly programs to the BAP Intermediate Language. Since verifying contracts by computing the weakest precondition depends on resolving indirect jumps, we implemented a procedure that integrates SMT solvers and BAP to discover all the possible assignments to the indirect jumps under the contract precondition.


european symposium on research in computer security | 2015

Trustworthy Prevention of Code Injection inźLinux on Embedded Devices

Hind Chfouka; Hamed Nemati; Roberto Guanciale; Mads Dam; Patrik Ekdahl

We present MProsper, a trustworthy system to prevent code injection in Linux on embedded devices. MProsper is a formally verified run-time monitor, which forces an untrusted Linux to obey the executable space protection policy; a memory area can be either executable or writable, but cannot be both. The executable space protection allows the MProspers monitor to intercept every change to the executable code performed by a user application or by the Linux kernel. On top of this infrastructure, we use standard code signing to prevent code injection. MProsper is deployed on top of the Prosper hypervisor and is implemented as an isolated guest. Thus MProsper inherits the security property verified for the hypervisor: i Its code and data cannot be tampered by the untrusted Linux guest and ii all changes to the memory layout is intercepted, thus enabling MProsper to completely mediate every operation that can violate the desired security property. The verification of the monitor has been performed using the HOL4 theorem prover and by extending the existing formal model of the hypervisor with the formal specification of the high level model of the monitor.


conference on current trends in theory and practice of informatics | 2015

Trustworthy Virtualization of the ARMv7 Memory Subsystem

Hamed Nemati; Roberto Guanciale; Mads Dam

In order to host a general purpose operating system, hypervisors need to virtualize the CPU memory subsystem. This entails dynami- cally changing MMU resources, in particular the page tables, to allow a hosted OS to reconfigure its own memory. In this paper we present the verification of the isolation properties of a hypervisor design that uses direct paging. This virtualization approach allows to host commodity OSs without requiring either shadow data structures or specialized hardware support. Our verification targets a system consisting of a commodity CPU for embedded devices ARMv7, a hypervisor and an untrusted guest running Linux.The verification involves three steps: i Formalization of an ARMv7 CPU that includes the MMU, ii Formalization of a system behavior that includes the hypervisor and the untrusted guest iii Verification of the isolation properties. Formalization and proof are done in the HOL4 theorem prover, thus allowing to re-use the existing HOL4 ARMv7 model developed in Cambridge.


Journal of Computer Security | 2016

Provably secure memory isolation for Linux on ARM

Roberto Guanciale; Hamed Nemati; Mads Dam; Christoph Baumann

The isolation of security critical components from an untrusted OS allows to both protect applications and to harden the OS itself. Virtualization of the memory subsystem is a key component to prov ...


trust and trustworthy computing | 2015

Trustworthy Memory Isolation of Linux on Embedded Devices

Hamed Nemati; Mads Dam; Roberto Guanciale; Viktor Do; Arash Vahidi

The isolation of security critical components from an untrusted OS allows to both protect applications and to harden the OS itself, for instance by run-time monitoring. Virtualization of the memory subsystem is a key component to provide such isolation. We present the design, implementation and verification of a virtualization platform for the ARMv7-A processor family. Our design is based on direct paging, an MMU virtualization mechanism previously introduced by Xen for the x86 architecture, and used later with minor variants by the Secure Virtual Architecture, SVA. We show that the direct paging mechanism can be implemented using a compact design, suitable for formal verification down to a low level of abstraction, without penalizing system performance. The verification is performed using the HOL4 theorem prover and uses a detailed model of the ARMv7-A ISA, including the MMU. We prove memory isolation of the hosted components along with information flow security for an abstract top level model of the virtualization mechanism. The abstract model is refined down to a HOL4 transition system closely resembling a C implementation. The virtualization mechanism is demonstrated on real hardware via a hypervisor capable of hosting Linux as an untrusted guest.


international conference for internet technology and secured transactions | 2010

TCvisor: A hypervisor level secure storage

Mohamad Rezaei; Nafise Sadat Moosavi; Hamed Nemati; Reza Azmi


world congress on internet security | 2011

Virtual machine based security architecture

Elahe Borghei; Reza Azmi; Alireza Ghahremanian; Hamed Nemati


Archive | 2017

Formal Analysis of Countermeasures against Cache Storage Side Channels

Hamed Nemati; Roberto Guanciale; Christoph Baumann; Mads Dam

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Mads Dam

Royal Institute of Technology

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Roberto Guanciale

Royal Institute of Technology

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Christoph Baumann

Royal Institute of Technology

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Oliver Schwarz

Royal Institute of Technology

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