Hamid Reza Pourshaghaghi

Dynamic voltage scaling based on supply current tracking using fuzzy Logic controller

It has been demonstrated that dynamic voltage and frequency scaling (DVFS) leads to a considerable saving in dynamic and static power of a processor. In this paper, we present an adaptive framework that can be used to dynamically adjust supply voltage and frequency of a processor under different application workloads. Voltage scaling decisions are made by a fuzzy logic (FL) block based on variations of the processors workload. By observing the supply-current of the processor and also its variation rate, the FL block can drive the processor to operate at the lowest possible voltage and also the corresponding minimum frequency, in which a specific application can meet all of its deadlines under time-constrained operation. As the voltage can change at the same time as the workload varies, significant savings in both dynamic and static power are achieved. Simulation results show that our approach outperforms a PID controller under distinct working loads.

Process Variation Reduction for CMOS Logic Operating at Sub-threshold Supply Voltage

Sub-threshold circuit design has become a popular approach for building energy efficient digital circuits. The main drawbacks are performance degradation due to the exponentially reduced driving current, and the effect of increased sensitivity to process variation. To obtain energy savings while reducing performance degradation, we propose the design of a robust sub-threshold library and post-silicon tuning using an adaptive fuzzy logic controller which performs body bias scaling. We show that our methodology is able to fix the performance, consequently, making the system more energy efficient and achieving maximum yield.

Optimal feedback control design using genetic algorithm applied to inverted pendulum

This paper introduces an application of genetic algorithm (GA) to determine weighting matrices Q and R elements in linear quadratic regulator (LQR) optimization process. The weighting matrices, Q and R are the most important components in LQR optimization and determine the output performances of the system. Commonly, a trial-and-error method has been used to construct the elements of these matrices. This method is simple, but very difficult to choose the best values that have good control performances. Because of this, the Bryson method can be employed to give better results. In this paper, we use GA to construct the weighting matrices Q and R properly with help of Bryson method. This idea gives a new alternative procedure in time varying feedback control to improve the stability performance. This design implemented in an inverted pendulum as a benchmark control problem.

Necessity of Fault Tolerance Techniques in Xilinx Kintex 7 FPGA Devices for Space Missions: A Case Study

In FPGA applications in space, implementations are generally protected using radiation-error mitigation techniques such as triple modular redundancy. For high-performance systems, such fault tolerance techniques can prove problematic due to large power overhead. This paper presents a case study on the Digital Receiver System (DRS) in the Netherlands-China Low-frequency Explorer (NCLE), which is implemented using a Xilinx Kintex 7 SRAM FPGA. Estimates for the critical cross-section of the system are presented, as well as estimated fault rates for a five-year mission to the second Earth-Moon Lagrange point. This includes simulations on the expected radiation environment, an analysis on the applicability of the used Xilinx Kintex 7 FPGA in these conditions and an analysis on the feasibility of implementing the DRS with minimal mitigation techniques for this mission. The steps performed during the analysis are described in detail, as to provide a guideline for replicating such an analysis for different space missions.

Fuzzy-Controlled Voltage Scaling Based on Supply Current Tracking

We discuss an adaptive fuzzy logic controller to accurately and robustly predict and track supply current variations of digital processors. The proposed controller tracks supply current variations without updating any parameter during its runtime prediction. It can be used to adjust the supply voltage and clock frequency of digital processors based on workload variations when accounting for timing-constraints and other practical requirements. Additionally, we comprehensively examine the stability analysis of the closed-loop configuration containing the fuzzy controller and the digital processor model. We prove that the fuzzy controller guarantees the asymptotic stability of the closed-loop architecture. Several experiments are performed to exhibit effectiveness of the proposed fuzzy controller comparing to the other existing conventional prediction methods. The results show that the proposed controller outperforms the other existing methods.

Power-performance optimization using fuzzy control of simultaneous supply voltage and body biasing scaling

Adaptive voltage scaling (AVS) leads to considerable power consumption savings in processors when maximum performance is not necessary. Simultaneous use of body biasing techniques and AVS can be used to reduce power in high performance processors without performance penalty. We present a new strategy for employing simultaneous AVS and forward body biasing (FBB) in determining the optimal trade-off between supply voltage and body bias voltage such that power consumption at a particular performance is minimized. For this purpose, an adaptive fuzzy logic controller is designed to make decision for optimal pair of supply and body bias voltage without sacrificing circuit performance. We evaluate usefulness of the method by applying it on real-time monitoring of a processors supply current when it executes an MPEG 2-decoding application. We achieved an average of 10.03% power reduction without performance penalty and 20.13% power saving at less than 5% performance penalty using proposed simultaneous AVS and FBB compare to fixed supply and body bias voltage.

EXPERIMENTAL REALIZATION OF A RECONFIGURABLE THREE INPUT, ONE OUTPUT LOGIC FUNCTION BASED ON A CHAOTIC CIRCUIT

This paper addresses and reports the construction of a reconfigurable logic block that can morph between all three input, one output logic functions based on chaos computing theory. The logic block is constructed based on a discrete chaotic circuit and can emulate all three input, one output logic functions. We have derived instruction set table of this logic block from the block that can be used as a look up table to generate any special three input, one output logic function. Additionally, sensitivity of constructed logic block to noise is investigated and a method for enhancing robustness of block with respect to the environment noise is proposed and implemented. This chaotic block offers inventive approaches for constructing higher order logic functions.

Optimized multiobjective H ∞ control applied to inverted pendulum

This paper introduces several practical aspects of designing multiobjective problems such as H∞ controllers. We present a procedure to obtain a controller with two degree of freedom (DOF). First we stabilize the nominal system by a conventional controller like LQR We use genetic algorithm to optimize LQR controller, too. This part of our controller leads to low cost of control input effort, and then we enforce other objectives in the framework of LMI optimization. This procedure leads to less energy consumption in comparison with using LMI methods alone. We design and implement this approach in an inverted pendulum as one of the most commonly nonlinear studied systems in the control area and can be considered as a benchmark for evaluating controlling methodologies.

Determining the necessity of fault tolerance techniques in FPGA devices for space missions

Abstract Functionality of electronic components in space is strongly influenced by the impact of radiation induced errors which may interfere with the proper operation of the equipment. In space missions, FPGA implementations are generally protected using computationally expensive radiation-error mitigation techniques such as error co rrecting codes (ECC) and triple modular redundancy (TMR). For high-performance systems, such fault tolerance techniques can prove problematic due to both the added computational requirements and their resulting power overhead. As such it is important to make a proper assessment of the expected error rates to make a proper selection of mitigation techniques. This paper provides an extensive overview of the techniques used for determining the necessity of such mitigation techniques in space missions and other situations where a large radiation dose will be encountered. Given the presented study and radiation analysis, in this paper an experimental example is presented in the form of a case study on the Digital Receiver System (DRS) in the Netherlands–China Low-frequency Explorer (NCLE) mission, which is implemented using a Xilinx Kintex-7 SRAM FPGA. Fault rates are estimated for a five-year mission to the second Earth-Moon Lagrange point (L2) and the chosen fault mitigation strategy as implemented in NCLE–DRS is presented. The effect of potential upsets on the functionality of DRS has been taken into account in order to make error estimations more precise. Thus, two test-benches are developed and presented to experimentally evaluate the effect of upsets in FPGA configuration memory and the data on the DRS final outputs. The approach provided in this paper should generalize well to other space missions, as long as a general estimate of the expected radiation environment is available.

Antenna design and implementation for the future space Ultra-Long wavelength radio telescope

In radio astronomy, the Ultra-Long Wavelengths (ULW) regime of longer than 10 m (frequencies below 30 MHz), remains the last virtually unexplored window of the celestial electromagnetic spectrum. The strength of the science case for extending radio astronomy into the ULW window is growing. However, the opaqueness of the Earth’s ionosphere makes ULW observations by ground-based facilities practically impossible. Furthermore, the ULW spectrum is full of anthropogenic radio frequency interference (RFI). The only radical solution for both problems is in placing an ULW astronomy facility in space. We present a concept of a key element of a space-borne ULW array facility, an antenna that addresses radio astronomical specifications. A tripole–type antenna and amplifier are analysed as a solution for ULW implementation. A receiver system with a low power dissipation is discussed as well. The active antenna is optimized to operate at the noise level defined by the celestial emission in the frequency band 1 − 30 MHz. Field experiments with a prototype tripole antenna enabled estimates of the system noise temperature. They indicated that the proposed concept meets the requirements of a space-borne ULW array facility.