Han-Su Kim

Three‐dimensional morphology of a very rough interface formed in the soldering reaction between eutectic SnPb and Cu

We have used scanning electron microscopy to study the interfacial morphology of the Cu‐Sn compounds formed between a eutectic SnPb alloy and Cu at 200 °C. A selective etching reveals the three‐dimensional morphology of the Cu‐Sn compounds. On the solder side, the compounds grow rapidly as big scallops and the interface becomes extremely rough as compared to the Cu side of the interface. In order to understand this rapid and extremely irregular growth of the Cu‐Sn compounds, we propose that it is caused by the dissolution of Cu into the liquid solder and the coarsening of the scallop‐type compounds by Ostwald ripening. The growth of the Cu‐Sn compounds has a serious impact on solder joint rework in electronic packaging.

Spalling of Cu6Sn5 spheroids in the soldering reaction of eutectic SnPb on Cr/Cu/Au thin films

The growth and morphology of intermetallic compounds between the solder and substrate play an important role in the solderability and reliability of electronic solder joints. Solder on thin films, as in chip joint, acts as an electrical and mechanical/physical interconnection between the chip and the substrate. We have studied the interfacial reactions between eutectic SnPb (63Sn37Pb, wt%) and Cr/Cu/Au thin films. Our results found here have been compared to the solder reaction on bulk Cu. The eutectic solder has 7° of wetting angle on Cr/Cu/Au thin films rather than 11° on Cu substrate. Sideband around the solder cap was found in both the thin film case and the Cu case. Spalling of Cu6Sn5 compound grains occurred in the thin‐film case when the Cu film was consumed but not in the case of bulk Cu. We observed a shape change from hemispherical ‘‘scallops’’ to spheroids before spalling took place. The shape change is assisted by ripening a reaction among the scallops. We have calculated a critical size of th...

Rate of consumption of Cu in soldering accompanied by ripening

What is the rate of consumption of Cu in soldering reactions has been a critical question in electronic packaging technology. The Cu films are consumed by Cu–Sn compound formation. Because the Cu thickness is limited and the rework of a solder joint requires a layer of unreacted Cu, the loss of Cu in soldering must be under control. At the solder interface, Cu–Sn intermetallic compounds do not form layered structures. Rather, the Cu6Sn5 phase grows as scalloplike grains into the molten solder and ripening occurs between the grains. Therefore, it has been difficult to determine the compound growth rate, and in turn the Cu consumption rate. Using cross‐sectional and top‐polished samples, we have measured the total volume of Cu–Sn intermetallic compounds formed between eutectic SnPb alloy and Cu substrate as a function of reflow time and temperature. We have deduced that after 1 min reflow, for example, the thickness of Cu consumed was about 0.36, 0.47, and 0.69 μm at 200, 220, and 240 °C, respectively.

Ripening‐assisted asymmetric spalling of Cu‐Sn compound spheroids in solder joints on Si wafers

In reacting eutectic SnPb solder with Ti/Cu and Cr/Cu/Au thin film metallization on Si wafers, we have observed spalling of Cu6Sn5 spheroids when the solder consumes the Cu. The formation of the spheroids is assisted by the ripening reaction among the compound grains. In addition we have observed an asymmetric spalling phenomenon using a sandwich structure, in which two wafers were soldered face‐to‐face. The spalling occurs predominantly at the interface at the bottom of the solder joint. It suggests that gravity plays a role.

Morphology of instability of the wetting tips of eutectic SnBi, eutectic SnPb, and pure Sn on Cu

The Pb-based solder used in microelectronics industry is becoming an environmental issue. To understand the wetting behavior of solders with and without Pb, we have studied the surface morphology and wetting reaction of eutectic SnBi, eutectic SnPb, and pure Sn on Cu through the measurements of wetting angle change and wetting tip stability by SEM and EDX. The wetting angle remains constant after the initial spread, but the eutectic SnPb/Cu continues to react and forms a reaction band in front of the solder edge as well as intermetallic compounds at the interface. For eutectic SnBi/Cu, there is no reaction at the wetting tip, and the wetting angle does not change much; however, the interfacial reaction between eutectic SnBi and Cu forms intermetallic compounds at the solder joint; the wetting tip is not in a static equilibrium. A rough surface and edge was observed on the eutectic SnBi/Cu joint, but the eutectic SnPb/Cu has a smoother surface and edge.

Microstructures of phased-in Cr–Cu/Cu/Au bump-limiting metallization and its soldering behavior with high Pb content and eutectic PbSn solders

The microstructure of phased-in Cr–Cu/Cu/Au multilayer thin films and their solderability with high Pb-content PbSn solder (95/5%) and eutectic PbSn solder (37/63%) were studied by using cross-sectional transmission electron microscopy and scanning electron microscopy. We found that the phased-in Cr–Cu layer is intermixed and grains of both Cr and Cu are elongated along the growth direction. This special compositionally graded or functionally graded microstructure presents a lock-in effect of the Cr and Cu grains. It has succeeded in preventing the spalling of Cu3Sn in solder joints formed using the 95/5% solder, but failed in preventing the spalling of Cu6Sn5 in those formed using the eutectic solder. We suggest that the difference may be due to the different dissolution rates of the two compounds in the solders.

Dewetting of molten Sn on Au/Cu/Cr thin‐film metallization

On Au/Cu/Cr thin film surface, a drop of molten Sn first spreads out to wet the surface, but it then pulls back to dewet. The latter is due to the spalling of Cu–Sn compounds and exposing the Cr surface to the molten Sn when all of the Cu film has been consumed by the wetting reaction. Dewetting is clearly undesirable for solder joints in electronic packaging; the phenomenon is presented here.

Unoxidized porous Si as an isolation material for mixed-signal integrated circuit applications

An isolation technology for radio frequency (rf) applications based on unoxidized porous Si (PS) is demonstrated. This study examines all the important issues pertinent to incorporating PS with Si very-large-scale integration (VLSI) technology, where PS is used as a semi-insulating material. Specifically, the issues on rf isolation performance of PS as a function of porosity [from coplanar waveguide (CPW) line measurements] and PS thickness (from on-chip inductors) and the stress generated from incorporating PS regions by anodization are discussed in detail. CPW line measurements show that the relative dielectric constant of PS films decreases from 9 to 3 with increasing porosity from 24% to 78%. PS is a very low loss material with loss tangent <0.001 at 20 GHz when its porosity is above 51%. rf crosstalk through a Si substrate can be reduced to that through air by inserting a PS trench between noise generating circuit and noise sensing circuit. On-chip spiral inductors fabricated on top of PS regions of ...

Effective method for stress reduction in thick porous silicon films

A promising stress control process is demonstrated to achieve near-zero stress levels in thick porous silicon (PS) films. Stress reduction is necessary for thick PS structures to be used for radio-frequency applications such as on-chip inductors and transmission lines that require very thick (>100 μm) insulating materials. This study employs a standard sample structure with 50-μm-thick PS films formed on p+ substrates through anodization under 50 mA/cm2 and 25% HF concentration. Mass spectroscopy analysis shows that the desorption of hydrogen is correlated with the stress evolution in PS films. As-prepared PS films are under compressive stress. Thermal annealing in N2 ambient turns it into tensile stress. Further annealing in an oxidizing ambient restores the compressive stress. Such stress evolution can be explained by the atomic structure changes on the pore walls of PS films: H2-passivated and oxidized Si surfaces result in compression in PS films, whereas reconstructed state results in tension. These ...

Effective crosstalk isolation through p/sup +/ Si substrates with semi-insulating porous Si

Through-the-wafer porous Si (PS) trenches have been used to provide radio frequency (RF) isolation in Si because of their semi-insulating property. Reduction of crosstalk by 70 dB at 2 GHz and 45 dB at 8 GRz is demonstrated between Al pads with 800 /spl mu/m separation on p/sup +/Si. Crosstalk suppression increases linearly with increasing PS width to beyond 320 /spl mu/m. This suppression is degraded by one order of magnitude when the Si underneath the PS trenches remains and serves as a residual path for crosstalk. These results show that PS is an excellent candidate for RF isolation in modern VLSI technology.