Hangu Yeo

Requirements for motion-estimation search range in MPEG-2 coded video

The motion-estimation search range required for interframe encoding with the MPEG-2 video compression standard depends on a number of factors, including video content, video resolution, elapsed time between reference and predicted pictures, and, just as significantly, pragmatic considerations in implementing a cost-effective solution. In this paper we present a set of experimental results that provide a probabilistic characterization of the size of motion vectors for different types of video, from well-known standard test sequences to fast-paced sports sequences to action movie clips. We study the impact of search range on compression efficiency and video quality. Finally, and on the basis of these results, we conclude with recommendations for target search ranges suitable for high-quality compression of standard and high-definition video.

Video Analysis and Compression on the STI Cell Broadband Engine Processor

With increased concern for physical security, video surveillance is becoming an important business area. Similar camera-based system can also be used in such diverse applications as retail-store shopper motion analysis and casino behavioral policy monitoring. There are two aspects of video surveillance that require significant computing power: image analysis for detecting objects, and video compression for digital storage. The new STI CELL broadband engine (CBE) processor is an appealing platform for such applications because it incorporates 8 separate high-speed processing cores with an aggregate performance of 256Gflops. Moreover, this chip is the heart of the new Sony Playstation 3 and can be expected to be relatively inexpensive due to the high volume of production. In this paper we show how object detection and compression can be implemented on the CBE, discuss the difficulties encountered in porting the code, and provide performance results demonstrating significant speed-up

A cost function with position penalty for motion estimation in MPEG-2 video coding

We propose a new cost function for the motion estimation algorithm. A position penalty has been added to the conventional cost function, Sum of Absolute Difference (SAD), to regulate the motion field. The effort is focused on minimization of the size of motion vector difference as well as residual error which need to be coded. Compared to the existing motion field regulation methods, the proposed method has a better chance to choose minimum distortion which allows it to have better picture quality with a fixed bit rate. Simulation results show that the proposed cost function outperforms the existing methods with minimal increase of computational cost, which makes it attractive for hardware implementation.

OpenCL and parallel primitives for digital TV applications

Open Computing Language®(OpenCL®), which is created to support H. Yeo parallel programming of heterogeneous multicore-processor systems, has a very large potential for high-performance computing and consumer electronics since it provides application programming interfaces (APIs) to help make a portable code that runs across multiple devices. OpenCL is still under development, and it is not clear whether OpenCL has any advantages over other frameworks aside from portability. The purpose of our project was to define evaluation criteria, empirically evaluate OpenCL as a programming framework using evaluation criteria (e.g., performance, productivity, and portability criteria), define and implement parallel primitives in OpenCL, and demonstrate how the use of the implemented parallel primitives can have benefits for our target applications. Parallel primitive library APIs are defined to implement parallel algorithms in OpenCL, and a set of data- and task-parallel primitives is implemented and incorporated in the target applications. Multicore central processing units, the Cell Broadband Engine®(Cell/B.E.®), and graphics processing units are used as target platforms, and digital TV applications are used to evaluate usefulness of OpenCL. Preliminary results show that parallel primitives can be one of the ways to improve application performance and programmer productivity with respect to OpenCL while still maintaining software portability.

Accelerating Mutual-Information-Based Linear Registration on the Cell Broadband Engine Processor

Emerging multi-core processors are able to accelerate medical imaging applications by exploiting the parallelism available in their algorithms. We have implemented a mutual-information-based 3D linear registration algorithm on the Cell Broadband Enginetrade processor. By exploiting the highly parallel architecture and its high memory bandwidth, our implementation with two CBE processors can register a pair of 256x256x30 3D images in one second. This implementation is significantly faster than a conventional one on a traditional microprocessor or even faster than a previously reported custom-hardware implementation. In addition to parallelizing the code for multiple cores and organizing the data structure for reducing the amount of the memory traffic, it is also critical to optimize the code for the SIMD pipeline structure. We note that code optimization for the SIMD pipeline alone results in a 4.2x-8.7x acceleration for the computation of small kernels. Further, SIMD optimization alone results in a 4.5x end-end application speedup.

Issues in reduced-resolution decoding of MPEG video

Given a high resolution compressed video, we investigate the problem of simplifying the memory and computational requirements of the decoder, when the intended playback resolution is less than the encoded resolution. We show that significant savings can be obtained in the amount of temporary storage space used, memory bandwidth between the processor and local memory, and raw computational complexity, while not incurring a significant loss in perceptual quality. Most video compression standards make special adjustments to deal with interlaced video. We explore how the proposed solution adapts to these situations and suggest modifications which improve the quality of the reconstructed video. Results from using these algorithms on a number of test sequences compressed with the MPEG-2 standard are presented.

Parallel implementation of external sort and join operations on a multi-core network-optimized system on a chip

In a commercial Relational Database Management System (RDBMS), sort and join are the most demanding operations, and it is quite beneficial to improve the performance of external sort and external join algorithms that handle large input data sizes. This paper proposes parallel implementations of multithreaded external sort and external hash join algorithms to accelerate IBM DB2, one of leading RDBMSs, using an IBM Power Edge of Network (IBM PowerEN™) Peripheral Component Interconnect Express (PCIe) card as an accelerator. The preliminary results show that the proposed parallel implementation of the algorithms on PowerEN™ PCIe card can speed up the DB2 sort and join performance about two times.

An automated image segmentation and classification algorithm for immunohistochemically stained tumor cell nuclei

As medical image data sets are digitized and the number of data sets is increasing exponentially, there is a need for automated image processing and analysis technique. Most medical imaging methods require human visual inspection and manual measurement which are labor intensive and often produce inconsistent results. In this paper, we propose an automated image segmentation and classification method that identifies tumor cell nuclei in medical images and classifies these nuclei into two categories, stained and unstained tumor cell nuclei. The proposed method segments and labels individual tumor cell nuclei, separates nuclei clusters, and produces stained and unstained tumor cell nuclei counts. The representative fields of view have been chosen by a pathologist from a known diagnosis (clear cell renal cell carcinoma), and the automated results are compared with the hand-counted results by a pathologist.

Digital video surveillance platform based on cell processor and H.264 video compression

We analyze challenges in the current approaches to digital video surveillance solutions, both technically and financially. We propose a Cell Processor based digital video surveillance platform to overcome those challenges and address ever growing needs in enterprise class surveillance solutions capable of addressing multiple thousands camera installations. To improve the compression efficiency we have chosen H.264 video compression algorithm which outperforms all standard video compression schemes as of today.