Hani Ragai

A Low-Power Wideband CMOS LNA for WiMAX

In this brief, the design of a low-power inductorless wideband low-noise amplifier (LNA) for worldwide interoperability for microwave access covering the frequency range from 0.1 to 3.8 GHz using 0.13-mum CMOS is described. The core consumes 1.9 mW from a 1.2-V supply. The chip performance achieves S11 below -10 dB across the entire band and a minimum noise figure of 2.55 dB. The simulated third-order input intercept point is -2.7 dBm. The voltage gain reaches a peak of 11.2 dB in-band with an upper 3-dB frequency of 3.8 GHz, which can be extended to reach 6.2 GHz using shunt inductive peaking. A figure of merit is devised to compare the proposed designs to recently published wideband CMOS LNAs

Equivalent lumped element models for various n -port through silicon vias networks

This paper proposes an equivalent lumped element model for various multi-TSV arrangements and introduces closed form expressions for the capacitive, resistive, and inductive coupling between those arrangements. The closed form expressions are in terms of physical dimensions and material properties and are driven based on the dimensional analysis method. The models compactness and compatibility with SPICE simulators allows the electrical modeling of various TSV arrangements without the need for computationally expensive field-solvers and the fast investigation of a TSV impact on a 3-D circuit performance. The proposed model accuracy is tested versus a detailed electromagnetic simulation and showed less than 6% difference. Finally, the proposed model can be a possible solution to the industrial need for broadband electrical modeling of TSVs interconnections arising in 3-D integration. Also, our presented work provides valuable insight into creating guidelines for TSV macro-modeling.

ZigBee wireless sensor network for radiation monitoring at nuclear facilities

Wireless Sensor Networks (WSN) is increasing its market share in many industrial, health, surveillance and nuclear applications. This paper describes the design of a WSN that allows smart real time monitoring of radiation levels at nuclear facilities. We develop a local low cost prototype of wireless sensor node equipped with a radiation sensor. The wireless node based on ZigBee technology and Arduino platform, it is implemented using TI CC2530 chips. The radiation sensor is based on Geiger Muller tube (GMT) as a reliable detector for the radioactive particulates in the gaseous effluent vented from nuclear facilities. The WSN allows the operators to record and control the radiation levels emitted to the environment and it is supported with warning system for the early detection of radiation release. We evaluated the performance of the radiation sensor by the accuracy of the readings while the wireless link performance is represented in terms of the Received Signal Strength Indicator (RSSI), the Link Quality Indicator (LQI) and the Packet Reception Ratio (PRR).

A Third-Order 9-Bit 10-MHz CMOS

We present a wideband architecture for DeltaSigma modulators using a single active stage and two switched capacitor passive stages. The mixed active-passive implementation has performance advantages over traditional switched-capacitor (SC) or continuous-time implementations, particularly for high-resolution, wideband applications with high sampling rates and moderate oversampling ratios. Design insensitivity to clock jitter and process variations is achieved by the good choice of the modulator architecture. The proposed modulator is designed in 0.13-mum CMOS technology and meets all major requirements for application in IEEE 802.16 wireless MAN receivers. Circuit simulations show that the modulator with a single bit quantizer consumes 5.5 mW from a 1.2-V power supply and achieves a 9-bit resolution over a 10-MHz bandwidth at an OSR of 32. Good performance is also achieved for lower bandwidth applications.

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Upon tightening new regulations, the demand for using smart wireless sensing for health, safety, and surveillance applications of nuclear installations is growing rapidly. To help with the developments, this paper describes the design of a practical small-scaled wireless sensor network (WSN) that allows a smart real-time monitoring of radiation levels at nuclear facilities. A wireless system compiled with a radiation sensor and associated peripherals been developed and implemented upon ZigBee technology using TI CC2530 chip. The radiation sensor uses a Geiger Muller tube as a reliable detector for the radioactive particulates in the gaseous effluent vented from nuclear facilities. The WSN allows the operators to record and control the radiation levels emitted to the environment and it is supported with a warning system, for the early detection of radiation release. However, building a reliable wireless sensing system with an effective coverage, especially for indoor applications, requires professional planning and proper investigation. In this paper, a procedure to investigate the wireless sensing coverage is reported where a ray-tracing simulator is adopted to enable the wireless node placement prior to the deployment. A real test scenario has been implemented based on the built wireless node to examine network coverage inside a 60-m hallway and results have been compared with simulations showing a 100% packet reception ratio.

Modulator With One Active Stage

The implementation of all components of hot-carrier reliability simulation in Eldo is described in this paper. A repetitive simulation scheme has been adopted to ensure accurate prediction of the circuit-level degradation process under dynamic operating conditions. Two approaches for modeling the degraded MOS transistor have been implemented, namely, the parameter fitting method and a newly proposed /spl Delta/I/sub d/ model. The new model overcomes the discontinuity and subthreshold invalidity of the existing models. The model has proven high accuracy for two well known foundries on their 0.25 /spl mu/m technologies. Simulation is results on some direct applications like inverters and ring oscillator circuits are also presented in this paper.

Real-Time Radiological Monitoring of Nuclear Facilities Using ZigBee Technology

In this paper, a layout scheme for accurate common-centroid rectangular unit-capacitor arrays is presented with detailed explanation of the rules used to improve matching. This layout technique is combined with a common-centroid arbitrary-value capacitor placement algorithm to form an automatic capacitor array generation tool. Finally, design and measurement results of a test chip that intends to evaluate the effectiveness of this automatic array generation tool are presented. Results indicate significant improvements in

Implementation of hot-carrier reliability simulation in Eldo

Cell-based design using a new D-latch is employed to design a VCO and prescaler for RF PLL frequency synthesizers using a standard 0.5 /spl mu/m CMOS process and 3.3 V supply. The divide-by 64/65 dual-modulus prescaler has a maximum operating frequency of 1.6 GHz and dissipates 9 mW. The VCO is a single-stage ring oscillator with a maximum frequency of 2.2 GHz and consumes 20 mW. The VCO and prescaler combination operates at a maximum frequency of 1.6 GHz and consumes 56 mW.

Compensated layout for automated accurate common-centroid capacitor arrays

This paper presents a four-bit flash type Analog to Digital Converter (ADC). The design is suitable for Ultra Wide Band (UWB) applications due to its high operating frequency and low power consumption. The high operating frequency is due to the pipelined nature of the design. The low power consumption is due to the minimized transistor sizes and modularity of the design. The proposed ADC is designed, integrated and simulated using Cadence EDA Tools. The simulation was done using a 3.3 V, 0.35 mum CMOS Technology.

CMOS VCO-prescaler cell-based design for RF PLL frequency synthesizers

In this paper, design and measurement results of a test chip that intends to evaluate differences between layout techniques for rectangular unit-capacitor arrays are introduced. Precision capacitor ratios are compared using a switched-capacitor biquad and a pseudo-floating gate configuration. The test chip is used to evaluate the effectiveness of an automatic common-centroid capacitor array generation tool with arbitrary capacitor ratios. Results indicate significant improvements in ratio accuracy, which have a direct impact on a wide range of applications such as filters for wireless communications, hard drives, and high precision baseband processing.