Alaa El-Rouby

95-GHz scattering by terrain at near-grazing incidence

This study, consisting of three complimentary topics, examines the millimeter-wave backscattering behavior of terrain at incidence angles extending between 70 and 90/spl deg/, corresponding to grazing angles of 20/spl deg/ to 0/spl deg/. The first topic addresses the character of the statistical variability of the radar backscattering cross section per unit area /spl sigma//sub A/. Based on an evaluation of an extensive data set acquired at 95 GHz, it was determined that the Rayleigh fading model (which predicts that /spl sigma//sub A/ is exponentially distributed) provides an excellent fit to the measured data for various types of terrain covers, including bare surfaces, grasses, trees, dry snow, and wet snow. The second topic relates to the angular variability and dynamic range of the backscattering coefficient /spl sigma//sup 0/, particularly near grazing incidence. We provide a summary of data reported to date for each of several types of terrain covers. The last topic focuses on bare surfaces. A semi-empirical model for /spl sigma//sup 0/ is presented for vertical (VV), horizontal (HH), and cross (HV) polarizations. The model parameters include the incidence angle /spl theta/, the surface relative dielectric constant /spl epsiv/, and the surface roughness ks, where k=2/spl pi///spl lambda/ and s is the surface root mean square (RMS) height.

A complete solution for the power delivery system (PDS) design for high-speed digital systems

The trend in high-speed digital circuits is to increase in speed and density, consume more current and to operate at lower voltage. This fast increase in the maximum current consumption and switching speed combined with the decrease of the operating voltage causes the allowable absolute voltage variations to decrease, which makes the PDS design a more challenging task than ever.

Lumped elements model for substrate noise coupling

A new lumped elements model for substrate parasitics in integrated circuits is introduced. The new model depends on frequency, contacts size, separation between contacts, and substrate conductivity. The model consists of four lumped elements that are evaluated using few numbers of simulations and curve fitting steps. A closed form expression has been provided for each lumped element. By evaluating these expressions, the model is used for any spacing distance between the aggressor contact and the victim one for arbitrary contact size. The introduced model shows very good agreement (<; 5% error) when compared against electromagnetic field solver simulations over frequency ranges up to 30GHz.

Different scenarios for estimating coupling capacitances of through silicon via (TSV) arrays

This paper presents characterization for coupling capacitance in through silicon Vias (TSV) arrays. Two scenarios are proposed to estimate the coupling capacitance between TSVs in TSVs array. First scenario is by using a closed form expression that accounts for the shielding effect resulted by TSVs. Second scenario is based on the existence of initial measured capacitance value at certain dimensions, thereafter the capacitance values can be obtained at other dimensions using scaling equations.

Arbitrary Modeling of TSVs for 3D Integrated Circuits

This book presents a wide-band and technology independent, SPICE-compatible RLC model for through-silicon vias (TSVs) in 3D integrated circuits. This model accounts for a variety of effects, including skin effect, depletion capacitance and nearby contact effects. Readers will benefit from in-depth coverage of concepts and technology such as 3D integration, Macro modeling, dimensional analysis and compact modeling, as well as closed form equations for the through silicon via parasitics. Concepts covered are demonstrated by using TSVs in applications such as a spiral inductorand inductive-based communication system and bandpass filtering.

TSV-based on-chip inductive coupling communications

This paper presents a novel wireless through silicon via (TSV) communication structure based on near-field inductive-coupling. The proposed system uses a spiral inductor built using TSV technology. The electrical performance obtained from EM-based S-parameter simulations for different number of turns and configurations are presented. The proposed wireless TSV shows good coupling coefficient. A closed form expression for the coupling coefficient is presented. This coupling expression is verified against EM simulations and showed good agreement. The proposed wireless TSV system provides small area (30 μm)2 for typical design values. This proposed communication system is enabling NoC.

Current source based standard-cell model for accurate timing analysis of combinational logic cells

Timing verification is an essential process in nanometer design. Therefore, static timing analysis (STA) is currently the main aspect of performance verification. Traditional STA is based on lookup tables with input slew and output load capacitance. It is becoming insufficient to accurately characterize many significant aspects of the conventional cell delays models, such as: the process variations, nonlinear waveforms, nonlinear loads, and multiple inputs switching (MIS). Therefore, the current trend in modern designs is to use current source based models (CSM), which model MOSFETs as a transconductance. This paper proposes a CSM for combinational logic cells which can accommodate single input switching (SIS) signals. It can also handle where small capacitances are connected at the gate output, while fast ramp signals are applied to the gate input. When compared with ELDO, the proposed model produces more accurate stage delay than that obtained from the standard cell lookup tables.

Introduction: Work Around Moore’s Law

Interconnect dimensions and complementary metal–oxide–semiconductor (CMOS) transistor feature sizes approach their physical limits. Therefore, scaling will no longer be the sole contributor to performance improvement. In addition to trying to improve the performance of traditional CMOS circuits, integration of multiple technologies and different components in a high-performance heterogeneous system is a major trend. This chapter briefly surveys key technology level trends, classified as “More Moore” such as: new architectures (silicon on insulator, SOI; FinFET; Twin-Well) and new materials (High-K, metal gate, strained Si), “More than Moore” such as: new interconnect schemes (three-dimensional, 3D; network on chip, NoC; optical; wireless), and “Beyond CMOS” such as: new devices (molecular computer, biological computer, quantum computer).

Library based macro-modeling methodology for Through Silicon Via (TSV) arbitrary arrays

In this paper, a novel library-based macro-modeling technique is developed to extract equivalent RLGC model which is spice compatible for TSV arrays of any size N×M. The built model accounts for Through Silicon Via (TSV) parasitic dependence on the array structural parameters and the frequency dependent properties of the silicon substrate. The developed macro-model constructs an equivalent parasitic matrix that could be used by circuit simulators to estimate the maximum signal frequency as well as noise in the TSV array. The key idea of the macro-model is to partition any given TSV arrays into smaller and fixed-size arrays. Smaller arrays are characterized and their parasitic are stored in the library. Using a divide and conquer technique, the final solution of the TSV array is produced. A detailed comparison of the proposed macro-modeling technique against the parasitic extracted by microwave simulation, for different structures with different sizes, shows a maximum error of 10% and an average error of 5%. Furthermore, the performance of library based macro-modeling is order of magnitude faster than the microwave simulation.

An Isotropic Algorithm for Solving Maxwell's Equations in 2D

A popular time evolution algorithm for solving Maxwells equations for electromagnetic problems is the Yees finite difference time domain (FDTD) algorithm. This algorithm introduces a non physical algorithmic anisotropic dispersion error and limited stability range. A new improved algorithm with isotropic dispersion error, better stability and faster execution is introduced in this paper. In this study, we compared the results of our improved isotropic algorithm, for simple and well-known problems, to that of the exact solution and that of the Yee algorithm. These comparisons show more accurate results for our improved isotropic algorithm compared to that for the Yee Algorithm. For practical application problems where solutions are too complicated to be solved analytically, we compared our algorithm to that of Yee and found that our algorithm simulate such problems faster and with smaller error.