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Dive into the research topics where Hans-Jürgen Herpel is active.

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Featured researches published by Hans-Jürgen Herpel.


field-programmable custom computing machines | 1993

A reconfigurable computer for embedded control applications

Hans-Jürgen Herpel; Norbert Wehn; Michael Gasteier; Manfred Glesner

The authors present a custom computer together with a software environment for rapid implementation of algorithms on reprogrammable hardware. The custom computer is based on FPGA boards embedded in a programmable interconnection network. The transformation of an algorithmic system specification into a configuration file for the FPGAs is supported through a set of high-level and structural synthesis tools. Hardware and software are tuned, but not limited to the application domain of real-time control. The presented approach is not a push-button approach, it takes advantage of the experience of the designer at several stages to reach a near optimal solution.<<ETX>>


european design automation conference | 1992

Application-specific microelectronics for mechatronic systems

Peter Windirsch; Hans-Jürgen Herpel; A. Laudenbach; Manfred Glesner

A methodology for the design of microelectronic subsystems in a mechatronic environment is presented, and its application to various problems is described. Several strategies from hardware-in-the-loop simulation over rapid prototyping of ASIC-based systems with field programmable gate arrays to the design of application-specific integrated processors are offered. The efficiency of the design system is demonstrated for three mechatronic applications: a self-controlled clutch, ignition control of a combustion engine, and a turbine compressor unit state estimator.<<ETX>>


european design automation conference | 1992

High-level synthesis in a rapid-prototype environment for mechatronic systems

Norbert Wehn; Hans-Jürgen Herpel; Thomas Hollstein; Peter Poechmueller; Manfred Glesner

The application of high-level synthesis techniques onto a rapid-prototyping board is presented. The board is part of a design methodology that supports the development of embedded information processing units in mechatronic systems during early design phases. The spectrum of realizations ranges from single task software implementations on a single board computer to an ASIC emulation in a heterogeneous multiprocessor environment. Emphasis is on the automatic synthesis of hardware modules to be realized as ASICs. A synthesis environment is presented which automatically maps modules to be implemented as ASICs onto a rapid-prototyping board.<<ETX>>


rapid system prototyping | 1991

RAMSES-a rapid prototyping environment for embedded control applications

Hans-Jürgen Herpel; Norbert Wehn; Manfred Glesner

An environment is given for fast prototyping of real-time systems. The supported spectrum of realizations for such systems varies from single task implementations on a general purpose microprocessor to heterogeneous multiprocessor systems with application specific processors. The prototyping environment includes a language to describe a real-time system, a compiler that transforms the description into its specified realization format and a hardware environment that is based on a VMEbus system. The VMEbus system includes a Motorola 68020 CPU with multi-tasking operating system and a prototyping board which can be either configured as multi-DSP board or as emulation board for the implementation of an application specific processor architecture.<<ETX>>


great lakes symposium on vlsi | 1991

A VLSI implementation of a state variable filter algorithm

Hans-Jürgen Herpel; Peter Windirsch; Manfred Glesner; J. Fuhrer; J. Busshardt

The authors present a digital signal processor (DSP) architecture whose powerful CPU is optimized to solve a state variable filter algorithm, but is not limited to that application. State variable filters perform low pass filtering and generate the derivatives of the filtered signal. These signals are used in systems for real-time process identification. In order to minimize the number of components, program and data memory, timers, and peripheral control logic are integrated on the DSP chip. Software development for this DSP is supported by an assembler, simulator and high level language compiler. In addition to the presentation of the architecture, a design methodology is introduced which uses rapid prototyping techniques to verify system design and algorithms in their real-time environment.<<ETX>>


modeling, analysis, and simulation on computer and telecommunication systems | 1994

MCEMS Toolbox/spl minus/a hardware-in-the-loop simulation environment for mechatronic systems

Hans-Jürgen Herpel; Michael Held; Manfred Glesner

This paper presents a design and simulation environment to support the validation of design concepts for embedded systems during early design phases. The tool is built around a methodology based on rapid prototyping. The MCEMS Toolbox supports the designer during the architectural, detailed design and implementation phase with a set of models, software and hardware for system description, prototype synthesis and execution under real-time conditions. Thus, specifications can be validated during early design phases which shortens the overall development time.<<ETX>>


field programmable logic and applications | 1995

Prototype Generation of Application-Specific Embedded Controllers for Microsystems

Hans-Jürgen Herpel; Ulrike Ober; Manfred Glesner

Microsystems technology is a rapidly growing field that requires application specific solutions for complex data processing at very low power and area consumption, and cost. In most cases single chip solutions are necessary to fulfill these strong requirements. Several studies showed that the later in the design process an error is detected the higher the costs are to correct it. Rapid prototyping is a proven method to check a design against its requirements during early design phases and thus shorten the overall design cycle. In this paper we present a design environment that supports the designer of application specific embedded controllers during the requirements validation phase.


field programmable gate arrays | 1992

High Level Synthesis in an FPL-Based Computer Aided Prototyping Environment

Peter Poechmueller; Hans-Jürgen Herpel; Manfred Glesner; Fang Longsen

This paper presents a design methodology to support the design of embedded information processing units in mechatronic systems during early design phases. System partitioning into a set of software and hardware modules is done at system description level. User guided and automated synthesis tools generate a fully functional prototype that can be connected to the mechanical subsystem to estimate system performance. The spectrum of realizations ranges from single task software implementations on a single standard processor to application specific integrated processors in a heterogeneous multi-processor environment. In this paper emphasis is put on high level synthesis aspects for the ASIP emulation part of the whole system.


Proceedings Euro ASIC '92 | 1992

High-level synthesis applied to an ASIC emulation board

Norbert Wehn; Hans-Jürgen Herpel; Thomas Hollstein; Manfred Glesner

Presents the application of high-level synthesis methodologies to an ASIC emulation board. The emulation board is part of a design methodology that supports the design of embedded information processing units in mechatronic systems during early design phases. The methodology provides fully functional prototypes which can be connected to the mechanical subsystem in order to estimate system performance. This paper addresses the automatic synthesis of hardware modules to be realized as ASICs.<<ETX>>


rapid system prototyping | 1996

Hierarchical partitioning in a rapid prototyping environment

Ulrike Ober; Hans-Jürgen Herpel; Manfred Glesner

Rapid prototyping is a well accepted method in microsystems technology. During early design phases a design can be checked against its requirements and, using FPGAs, we are able to easily implement changes and correct faults. The emulation board of the design called MCEMS (Methodology for the design of Embedded Microelectronic Systems), is assembled by FPGAs. To map an application specific embedded controller to this emulation board, the netlist has to be partitioned. None of the existing partitioning strategies are suitable for this system. In this paper we present a hierarchical partitioning approach that satisfies the requirements of this special application.

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Norbert Wehn

Technische Universität Darmstadt

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Thomas Hollstein

Tallinn University of Technology

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Ulrike Ober

Technische Universität Darmstadt

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Michael Held

Technische Universität Darmstadt

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Peter Poechmueller

Technische Universität Darmstadt

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Peter Windirsch

Technische Universität Darmstadt

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A. Laudenbach

Technische Universität Darmstadt

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Andreas König

Dresden University of Technology

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