Hans Peter Amann

High-level modeling using extended timing diagrams - A formalism for the behavioral specification of digital hardware

The principles of high level modeling of digital hardware circuits using the extended timing diagrams (ETD) formalism, which adds conditions, events, action expressions, and particular constraints to traditional timing diagrams, are described. Hierarchy and concurrency are also integrated so that a full top-down design becomes possible, enhancing at the same time the readability. While, for simulation purposes, the implementation of the formalism generates behavioral VHDL (VHSIC Hardware Description Language) models, a dedicated high-level translator generates VHDL code for synthesis. Both the ETD formalism and its implementation are part of MODES, a more complex modeling expert system including complementary editors.<<ETX>>

Modeling and Simulation of Electromechanical Transducers in Microsystems Using an Analogue Hardware Description Language

The analytical modeling and simulation of conservative electrostatic, electromagnetic and electrodynamic transducers found in microsystems using a non-linear lumped-parameter approach is presented in this paper. A comparison is made between this approach and the linearized equivalent circuit method. All models of transducers are written in HDL-A/sup TM/, a proprietary analogue hardware description language (HDL). System-level simulation is performed in the SPICE simulator using behavioral models of the transducers. Finally, a parameter extraction and HDL model generation tool for devices is presented.

A graphical approach to analogue behavioural modelling

In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper presents an original modelling method based on the graphical description of analogue electronic functional blocks. This method is intended to be automated and integrated into a design framework: specialists create behavioural models of existing functional blocks, that can then be used through high-level selection and specification. Applications of behavioural modelling are discussed.<<ETX>>

Algorithm for the inexact matching of high-level 3-D polyhedric representations

This paper describes a powerful inexact matching algorithms which has been applied with success to high-level 3D object representations in a 3D object recognition system. The algorithm combines in a promising way several approaches proposed in the past couple of years: an extension to the backtrack strategies for inexact matching of attributed relational sub- graphs, error correction isomorphism, determination of local attribute similarity, and global transformation fitting, features which are efficiently used for search-tree pruning. The algorithm was tested successfully in a series of experiments involving scenes with single and multiple objects.

Generating VHDL-A—like models using ABSynth

A method for the graphical specification and the automatic generation of analogue behavioural models is presented. This method has been implemented as a new software tool called ABSynth. The behaviour of the component to model is described as a functional diagram, which is then automatically translated into a VHDL-A-like analogue hardware description language. No syntax knowledge is necessary and the modelling time is reduced.

High-level specification of behavioural hardware models with MODES

The ever increasing complexity of digital hardware, forces the hardware designer to switch from a low-level capture-and-simulation process to a high-level design-and-synthesis process. In order to assist the designer during the specification phase, we designed MODES, a new high-level specification environment. MODES integrates graphical specification capture in various behavioural representations, a facility to merge various specification formats, a high-level simulation tool and, finally, code generation for simulation and synthesis, e.g. in VHDL-1076, IEEEs hardware description language. Furthermore, some verification and consistency-check mechanisms have been integrated.<<ETX>>

Behavioural modelling of sampled-data systems with HDL-A and ABSynth

In this paper we make use of a mixed analogue-digital HDL to model sampled-data systems. Modelling solutions are presented to code some sampled-data behaviour using either analogue or digital constructs of the language.

Behavioural modelling of analogue systems with absynth

In this chapter, we present the computer-aided analogue behavioural modelling tool ABSynth (Analogue Behavioural model Synthesizer). The behaviour to model is expressed graphically in the form of a Functional Diagram (FD) drawn as the interconnection of Graphical Building Symbols (GBS), each of which stands for some elementary analogue behaviour. The functional diagram describes the behaviour of the system only, not its physical structure. The corresponding HDL-A™ code is then generated automatically.

VHDL-based HW/SW cosimulation of microsystems

This paper presents a pragmatic solution for the hardware-software cosimulation of microsystems. It allows a user to coverify a microsystem made up of custom digital electronics, processing cores and software. It can also be extended to the cosimulation of mixed-mode (analogue-digital) systems as well as mixed-nature (e.g., electrical-mechanical) systems. The custom hardware is described in VHDL. The software is developed in a dedicated environment and then translated into VHDL for simulation. The processor is described in VHDL as an Instruction Set Simulator (ISS) able to execute the software. A single tool, a VHDL simulator, is used to simulate the whole system. Its graphical user interface has been extended with a new software debug window. The approach has been demonstrated for Microchip’s PIC16C5X microcontroller family.