Hans Rudolf Schindler

CRMA-II: a MAC protocol for ring based Gb/s LANs and MANs

Abstract CRMA-II is a MAC protocol for Gb/s LANs and MANs that are based on a single or dual-ring, with bus structures being covered as well. Data are transmitted in slots and buffer-insertion techniques are applied whenever data frames must be transmitted in contiguous slots or when immediate access to the media is required. Spatial slot reuse is achieved by freeing slots at their destination. Access to the media is controlled by a simple busy/free mechanism; it is enhanced by a reservation-based fairness mechanism. This results in fast access when the network is lightly loaded, while fair access and a tight delay bound are achieved during periods of sustained heavy load or overload. Fairness scheduling automatically adapts to the traffic requested by the nodes and causes minimal control intervention. Following current trends in communications, the standard ATM cell format has been adopted for both the medium and the attachment interfaces. CRMA-II control is only visible in an access sublayer between the standard ATM layer and the ATM transmission technology.

A scalable SDH/SONET framer architecture for datacom and telco applications

This paper presents the architectural concepts behind a versatile VLSI device that maps ATM, IP, and/or traditional T1/T3 traffic streams into SONET/SDH transport signals ranging from OC-1 to OC-48/STM-16. Additional key features for effective system integration are on-chip support for add-drop multiplexing, digital cross-connect, and automatic protection switching functions. A roadmap discussing the applicability of the developed concepts for next-generation framers up to OC-192/STM-64 is also presented.

Linear, Nonlinear, and Adaptive Delta Modulation

The paper treats linear and nonlinear methods that refine the delta modulation process. These methods improve the quality of the decoded signal at a given transmission rate. Two linear processes are analyzed. The first one matches the source signal to the coder for minimum weighted noise in the decoded signal. The second one influences the signal which is fed to the comparator; it shapes the spectrum of the quantization noise desirably. Two nonlinear methods used in the delta modulation process are discussed. The first achieves a best possible prediction of the future signal from past binary decisions and thus a reduction of the error signal. The methods of the second type make the coder adaptive to variations in the power level of the source signal. This results in a large dynamic range of the coding system. A comparison of the various methods is made and a coding system for speech signals, based on a suitable combination of these methods, is described.

An Adaptive Dual-Mode Coder/Decoder for Television Signals

An adaptive dual-mode coding system for television signals is described. Its main features are a low bit rate (1.5 bits per sample), the high quality of the reproduced picture, and its moderate hardware. The system is based on the statistical properties of video signals. Specifically, it makes use of the nonuniform spectrum of video signals in the form of a differential scheme containing linear prediction. Furthermore, areas of small amplitude changes between consecutive samples whose probability of occurrence is high are encoded with a reduced coding alphabet. Transients representing sharp edges in the picture are encoded and reproduced with little slope overload and busyness. A method for the buffering of the asynchronous data stream produced by the coder to match a synchronous channel is given.

Prototyping a 2.4 Gbit/s CRMA -II Dual-Ring ATM LAN and MAN

This paper proposes an auto-adaptive current control that makes possible to reduce torque ripples of multi-phase machines in open-circuited phase conditions. Contrary to existing methods, current references are not recomputed and the control scheme used in normal mode is auto-adapted in order to run the machine with open-circuited phases. The number of degrees of freedom of the control scheme is adapted to the number of degrees of freedom of the drive and current controllers are auto-adaptive in order to reject the induced speed-dependent harmonic voltage disturbances that appear in fault-mode. Experimental results are presented to show the effectiveness of the proposed method.

A scalable modular architecture for SDH/SONET technology

A scalable architecture for integrated SDH/SONET framers is presented. It exploits the fact that not only those framer functions that are obviously suited for parallel processing but all SDH/SONET overhead processing and most of the payload processing functions can be implemented as distributed algorithms. Thereby an M/spl times/STM-N framer also handles STM-M/spl times/N and STM-(M/spl times/N)c frames. These distributed algorithms cover frame scrambling, overhead byte processing, ATM and PPP payload handling, and interface implementations. A series of modular building blocks for this architecture and first complete framers is now available.