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Dive into the research topics where Hassan Elwan is active.

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Featured researches published by Hassan Elwan.


IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2000

A novel fully differential current conveyor and applications for analog VLSI

Ahmed Eladawy; Ahmed M. Soliman; Hassan Elwan

In this paper, a novel fully differential second-generation current conveyor (FDCCII) is presented. The proposed block is useful in mixed-mode applications where fully differential signal processing is required. Furthermore, the FDCCII can be used to realize MOSFET-C filters. The circuit has a bandwidth of about 10 MHz under heavy capacitive loads and can operate from low supply voltages down to /spl plusmn/1.5 V.


IEEE Journal of Solid-state Circuits | 2002

A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

Hussain A. Alzaher; Hassan Elwan; Mohammed Ismail

A new approach for designing digitally programmable CMOS integrated baseband filters is presented. The proposed technique provides a systematic method for designing filters exhibiting high linearity and low power. A sixth-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver. The filter consumes a current of 2.25 mA from a 2.7-V supply and occupies an area of 1.25 mm/sup 2/ in a 0.5-/spl mu/m chip. The proposed filter design achieves high spurious free dynamic ranges (SFDRs) of 92 dB for PDC (IS-54), 89 dB for GSM, 84 dB for IS-95, and 80 dB for WCDMA.


IEEE Transactions on Circuits and Systems I-regular Papers | 1997

Low-voltage low-power CMOS current conveyors

Hassan Elwan; Ahmed M. Soliman

New CMOS rail to rail second generation current conveyor circuits are proposed. First a class A current conveyor circuit which operates from a single supply of 1.5 V with a rail to rail voltage swing capability is given. The circuit is then modified to work as a class AB while maintaining the rail to rail swing capability. The class AB circuit works from supply voltages down to +1.1 V with standby current of 56 /spl mu/A. These new current conveyor realizations are insensitive to the threshold voltage variation caused by the body effect, which minimizes the layout area and makes both circuits a valuable addition to the analog VLSI libraries. PSpice simulation confirms the attractive properties of the proposed circuits.


IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 1996

A novel CMOS current conveyor realization with an electronically tunable current mode filter suitable for VLSI

Hassan Elwan; Ahmed M. Soliman

A novel CMOS realization of the second generation current conveyor is given. A circuit which compensates the voltage offset due to channel length modulation effect is then developed. The CCII is then used to realize a new electronically tunable low-pass-band-pass filter suitable for VLSI. Simulation results taking the second-order effects into account indicate the excellent performance of both the CCII circuit and the filter over a wide dynamic range.


IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2000

Digitally programmable decibel-linear CMOS VGA for low-power mixed-signal applications

Hassan Elwan; Mohammed Ismail

A new technique for realizing CMOS digitally-controlled decibel-linear variable gain amplifier (VGA) circuits is described. CMOS VGA circuits employing the proposed technique are then given. Besides being effective and simple to use from a system point of view, the VGA circuits offer a stable gain characteristic with precise gain control that is achievable without component spreading. The VGA provides a 25 dB gain control range per stage, with 0.55 dB gain steps and a gain error of less than 0.5 dB. It can also be digitally reconfigured to give a 60 dB gain control range with 6 dB gain steps. The VGA circuit provides digital offset trimming, processes voltage or current input signals and operates in a fully differential configuration. Simulation and experimental results are provided.


IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2003

A CMOS fully balanced second-generation current conveyor

Hussain A. Alzaher; Hassan Elwan; Mohammed Ismail

The design and implementation of a high performance CMOS fully balanced second-generation current conveyor (FBCCII) is presented. The proposed circuit is essential to extend the use of the CCII based circuits to integrated circuits (ICs) applications. The circuit is developed by applying the current sensing technique to a fully balanced version of a differential difference amplifier (DDA). A low power class AB circuit realization is implemented in a 1.2-/spl mu/m CMOS technology and its different characteristics are measured. Design examples of realizing fully balanced variable gain amplifiers (VGAs) and a bandpass filter based on the proposed FBCCII are given. Experimental results of the proposed circuits are included.


Analog Integrated Circuits and Signal Processing | 1996

CMOS differential current conveyors and application for analog VLSI

Hassan Elwan; Ahmed M. Soliman

Novel differential current conveyor building blocks are defined. CMOS realizations of these blocks are then given. One of the proposed conveyor circuits is seen to be insensitive to the threshold voltage variation due to the body effect. The properties of the differential current conveyors are shown to be suitable for VLSI applications employing MOS transistors operating in the ohmic region. This is demonstrated by realizing four quadrant multiplier cells, current mode and mixed mode continuous time MOSFET-C filters based on the proposed blocks. PSPICE simulations indicate the excellent performance of the differential current converyor circuits.


International Journal of Electronics | 1996

CMOS voltage controlled floating resistor

Hassan Elwan; Soliman A. Mahmoud; Ahmed M. Soliman

A new CMOS floating linear resistor circuit with a wide linearity range is proposed. The circuit employs 14 transistors all operating in the saturation region. A modified circuit which employs one more transistor, such that it is threshold voltage independent, is also given. PSPICE simulations taking into account the second order effects due to the channel length modulation and mobility degradation are given.


IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing | 2001

A CMOS Norton amplifier-based digitally controlled VGA for low-power wireless applications

Hassan Elwan; Ahmed M. Soliman; Mohammed Ismail

A CMOS variable-gain amplifier (VGA) for use in the baseband section of integrated wireless receivers is presented. The VGA circuit is based on a new CMOS realization of the Norton transresistance amplifier. The proposed CMOS realization operates from a 3-V supply voltage with rail-to-rail swing and class AB input and output stages. The standby current of the class AB stages employed can be accurately controlled, leading to a low power consumption, nonslew-rate-limited response. The VGA circuit provides a precise process-independent gain control range of 30 dB with 1-dB gain step. The circuit uses current division techniques to provide an area-efficient 6-bit digital offset trimming capability. Experimental results from a test chip fabricated through MOSIS are provided.


Analog Integrated Circuits and Signal Processing | 2000

Low Voltage Rail to Rail CMOS Current Feedback Operational Amplifier and its Applications for Analog VLSI

Soliman A. Mahmoud; Hassan Elwan; Ahmed M. Soliman

This paper presents a new CMOS current feedback operational amplifier (CFOA) with rail to rail swing capability at all terminals. The circuit operates as a class AB for lower power consumption. Besides operating at low supply voltages of ±1.5 V, the proposed CFOA has a standby current of 200 μA. The proposed CFOA circuit is thus a versatile building block for low voltage low power applications. The applications of the CFOA to realize a transconductor/multiplier cell, MOS-C differential integrator, MOS-C bandpass filter and MOS-C oscillator are given. PSpice simulations based on 1.2 μm level three parameters obtained from MOSIS are given.

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Hussain A. Alzaher

King Fahd University of Petroleum and Minerals

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Ahmet Tekin

University of California

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