Hector Pettenghi

Using multi-threshold threshold gates in RTD-based logic design: A case study

The basic building blocks for resonant tunneling diode (RTD) logic circuits are threshold gates (TGs) instead of the conventional Boolean gates (AND, OR, NAND, NOR) due to the fact that, when designing with RTDs, TGs can be implemented as efficiently as conventional ones, but realize more complex functions. Recently, RTD structures implementing multi-threshold threshold gates (MTTGs) have been proposed which further increase the functionality of the original TGs while maintaining their operating principle and allowing also the implementation of nanopipelining at the gate level. This paper describes the design of n-bit adders using these MTTGs. A comparison with a design based on TGs is carried out showing advantages in terms of power consumption and power delay product.

Method to Design General RNS Reverse Converters for Extended Moduli Sets

In recent years, research on residue number systems (RNS) has targeted larger dynamic ranges (DRs) in order to further explore their inherent parallelism. In this brief, we start from the traditional three-moduli set {2n, 2n - 1, 2n + 1}, with an equivalent 3 n-bit DR; propose horizontal and vertical extensions to scale the DR; and improve the parallelism according to the requirements. This brief also introduces a method to design general reverse converters for extended moduli sets with the desired DRs, whereas the existing state of the art allows to achieve at most (8n + 1) bit. The experimental results suggest that the proposed moduli set extensions allow for larger and more balanced moduli sets, in comparison with the state of the art, resulting in an improvement of the overall RNS performance at the cost of a slower reverse conversion operation.

Self-latching operation of MOBILE circuits using series-connection of RTDs and transistors

One of the most attractive features of MOBILE-based circuits is their self-latching operation, which allows pipelining at the gate level, and thus very high through-output, without any area overhead associated to the addition of the latches. However, the self-latching behavior is not inherent to the practical circuit topologies employed to implement MOBILE circuits. This paper reports on very simple MOBILE structures supporting this statement. The analysis performed is useful in extracting design guidelines to guarantee the required behavior.

Logic models supporting the design of MOBILE-based RTD circuits

Threshold logic is a computational model widely used in the design of resonant tunnelling diodes (RTDs) based circuits, i.e. these circuits are built from threshold gates. This paper explores two other computational models, generalized threshold gates (GTG) and multi-threshold threshold gates (MTTGs), also suitable to be realized with mobile based RTD structures. Circuits implementing them are described. Both logic models are generalizations of threshold logic and so the proposed circuit topologies further increase the functionality of the original TGs. Implementations of a non threshold function with the GTG and MTTG topologies are shown and compared.

Improved Nanopipelined RTD Adder Using Generalized Threshold Gates

Many logic circuit applications of resonant tunneling diodes are based on the monostable-bistable logic element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e., these circuits are built from threshold gates (TGs). This paper describes the design of full adders (FAs), using TG-based circuit topologies. Both the selection of different MOBILE TG networks and the use of gates that can be considered extensions of the MOBILE TG are addressed. The FAs are applied to the design of nanopipelined carry propagations adders, which are evaluated and compared to a previously reported one, showing advantages in terms of speed, power, and power-delay product.

Useful logic blocks based on clocked series-connected RTDs

This paper presents novel and extremely compact implementations, based of the multi-threshold threshold gate concept, for some useful building blocks for logic design. The circuits consist of resonant tunnelling diodes (RTDs) and heterostructure field effect transistors (HFETs). They can be used in nanopipelined architectures enabling high frequency operation of systems.

A novel contribution to the RTD-based threshold logic family

Many logic circuit applications of resonant tunneling diodes are based on the MOnostable-BIstable Logic Element (MOBILE). Threshold logic is a computational model widely used in the design of MOBILE circuits, i.e. these circuits are built from threshold gates. More recently, generalized threshold gates, also suitable to be realized with MOBILE RTD structures, are being investigated. In this paper we propose a novel MOBILE circuit topology obtained by exploiting threshold logic concepts and properties. A comparison in terms of speed and power performance between the proposed topologies and previous reported ones is carried out.

Programmable logic gate based on resonant tunnelling devices

This paper presents an extremely compact circuit topology able to implement a two-input programmable gate on the basis of multi-threshold gate concept. The circuit consists of resonant tunnelling diodes (RTDs) and heterostructure field effect transistors (HFETs). We provide detailed analysis n circuit design and simulation of such a programmable gate.

New circuit topology for logic gates based on RTDs

The augmentation of transistor technologies with Resonant Tunnelling Diodes (RTDs) has demonstrated improved circuit performance and it has been claimed that it could be the way to extend lifetime of current technologies. Thus the research on circuit topologies using RTDs and transistors is of critical importance for these emergent technologies. In particular, threshold logic gates (TGs) and multi threshold gates (MTTGs) have been efficiently implemented. In this Letter we propose a novel circuit topology to implement MTTGs which exhibits advantages in terms of speed and power consumption with respect to a previously reported circuit. A comparison between both topologies is carried out for an useful logic block: a gate which simultaneously implements the EXOR and the NAND functions.

Self-latching operation limits for MOBILE circuits

One of the most attractive features of MOBILE-based circuits is their self-latching operation, which allows pipelining at the gate level, and thus very high through-output, without any area overhead associated to the addition of the latches. However, the self-latching behavior is not inherent to the practical circuit topologies employed to implement MOBILE circuits. This paper reports on very simple MOBILE structures supporting this statement. The analysis performed allows extracting design guidelines to guarantee the required behavior